Unified Coverage Report :: Group Instance : attest_sw_binding_6

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1579

1

T17

17

T18

2

T41

4

auto[1]

1703

1

T2

1

T17

21

T18

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	98	1			T53	1		T140	1		T57	2
auto[134217728:268435455]	105	1			T17	2		T27	1		T28	1
auto[268435456:402653183]	111	1			T18	1		T41	1		T39	1
auto[402653184:536870911]	111	1			T17	1		T59	1		T33	1
auto[536870912:671088639]	101	1			T2	1		T17	1		T42	1
auto[671088640:805306367]	98	1			T18	1		T28	1		T57	1
auto[805306368:939524095]	102	1			T17	2		T28	1		T140	1
auto[939524096:1073741823]	82	1			T17	2		T59	1		T57	2
auto[1073741824:1207959551]	84	1			T17	1		T39	1		T28	1
auto[1207959552:1342177279]	112	1			T17	3		T26	1		T28	1
auto[1342177280:1476395007]	78	1			T57	2		T299	1		T25	1
auto[1476395008:1610612735]	93	1			T17	1		T28	3		T139	1
auto[1610612736:1744830463]	97	1			T28	2		T140	1		T85	1
auto[1744830464:1879048191]	113	1			T17	2		T41	1		T26	1
auto[1879048192:2013265919]	100	1			T17	2		T59	1		T27	1
auto[2013265920:2147483647]	90	1			T42	1		T28	1		T92	1
auto[2147483648:2281701375]	90	1			T28	1		T23	1		T57	1
auto[2281701376:2415919103]	123	1			T17	2		T18	1		T27	1
auto[2415919104:2550136831]	105	1			T17	2		T28	2		T140	1
auto[2550136832:2684354559]	123	1			T17	3		T41	1		T28	1
auto[2684354560:2818572287]	102	1			T41	1		T39	1		T26	2
auto[2818572288:2952790015]	91	1			T17	1		T42	1		T28	1
auto[2952790016:3087007743]	104	1			T39	1		T27	1		T28	1
auto[3087007744:3221225471]	95	1			T17	3		T42	1		T28	2
auto[3221225472:3355443199]	106	1			T42	2		T59	1		T27	1
auto[3355443200:3489660927]	111	1			T17	2		T28	1		T92	1
auto[3489660928:3623878655]	95	1			T39	2		T92	1		T140	1
auto[3623878656:3758096383]	124	1			T39	1		T28	3		T140	1
auto[3758096384:3892314111]	109	1			T18	1		T26	1		T27	1
auto[3892314112:4026531839]	113	1			T17	2		T26	1		T28	2
auto[4026531840:4160749567]	101	1			T17	5		T26	1		T28	1
auto[4160749568:4294967295]	115	1			T17	1		T28	2		T91	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	50	1			T140	1		T90	1		T7	1
auto[0:134217727]	auto[1]	48	1			T53	1		T57	2		T123	1
auto[134217728:268435455]	auto[0]	40	1			T27	1		T57	2		T225	1
auto[134217728:268435455]	auto[1]	65	1			T17	2		T28	1		T85	1
auto[268435456:402653183]	auto[0]	55	1			T18	1		T41	1		T39	1
auto[268435456:402653183]	auto[1]	56	1			T139	1		T57	1		T24	1
auto[402653184:536870911]	auto[0]	47	1			T17	1		T59	1		T133	1
auto[402653184:536870911]	auto[1]	64	1			T33	1		T140	1		T112	1
auto[536870912:671088639]	auto[0]	43	1			T17	1		T42	1		T28	1
auto[536870912:671088639]	auto[1]	58	1			T2	1		T28	1		T57	1
auto[671088640:805306367]	auto[0]	56	1			T28	1		T57	1		T54	2
auto[671088640:805306367]	auto[1]	42	1			T18	1		T141	1		T295	1
auto[805306368:939524095]	auto[0]	46	1			T17	1		T85	1		T54	2
auto[805306368:939524095]	auto[1]	56	1			T17	1		T28	1		T140	1
auto[939524096:1073741823]	auto[0]	40	1			T17	1		T57	1		T54	1
auto[939524096:1073741823]	auto[1]	42	1			T17	1		T59	1		T57	1
auto[1073741824:1207959551]	auto[0]	51	1			T39	1		T28	1		T140	2
auto[1073741824:1207959551]	auto[1]	33	1			T17	1		T140	1		T57	1
auto[1207959552:1342177279]	auto[0]	67	1			T17	3		T140	1		T54	1
auto[1207959552:1342177279]	auto[1]	45	1			T26	1		T28	1		T93	1
auto[1342177280:1476395007]	auto[0]	35	1			T21	1		T304	1		T58	3
auto[1342177280:1476395007]	auto[1]	43	1			T57	2		T299	1		T25	1
auto[1476395008:1610612735]	auto[0]	44	1			T17	1		T140	1		T369	1
auto[1476395008:1610612735]	auto[1]	49	1			T28	3		T139	1		T54	1
auto[1610612736:1744830463]	auto[0]	39	1			T28	1		T90	1		T91	1
auto[1610612736:1744830463]	auto[1]	58	1			T28	1		T140	1		T85	1
auto[1744830464:1879048191]	auto[0]	60	1			T17	1		T41	1		T27	1
auto[1744830464:1879048191]	auto[1]	53	1			T17	1		T26	1		T59	1
auto[1879048192:2013265919]	auto[0]	46	1			T17	2		T220	1		T298	1
auto[1879048192:2013265919]	auto[1]	54	1			T59	1		T27	1		T57	1
auto[2013265920:2147483647]	auto[0]	41	1			T42	1		T28	1		T33	1
auto[2013265920:2147483647]	auto[1]	49	1			T92	1		T94	1		T123	1
auto[2147483648:2281701375]	auto[0]	45	1			T28	1		T23	1		T57	1
auto[2147483648:2281701375]	auto[1]	45	1			T72	1		T68	1		T106	1
auto[2281701376:2415919103]	auto[0]	61	1			T18	1		T28	1		T220	1
auto[2281701376:2415919103]	auto[1]	62	1			T17	2		T27	1		T28	2
auto[2415919104:2550136831]	auto[0]	52	1			T28	1		T140	1		T112	1
auto[2415919104:2550136831]	auto[1]	53	1			T17	2		T28	1		T57	1
auto[2550136832:2684354559]	auto[0]	63	1			T17	1		T41	1		T28	1
auto[2550136832:2684354559]	auto[1]	60	1			T17	2		T218	1		T112	1
auto[2684354560:2818572287]	auto[0]	36	1			T41	1		T39	1		T140	1
auto[2684354560:2818572287]	auto[1]	66	1			T26	2		T218	1		T69	1
auto[2818572288:2952790015]	auto[0]	44	1			T28	1		T99	1		T259	1
auto[2818572288:2952790015]	auto[1]	47	1			T17	1		T42	1		T139	1
auto[2952790016:3087007743]	auto[0]	53	1			T39	1		T27	1		T112	1
auto[2952790016:3087007743]	auto[1]	51	1			T28	1		T23	1		T112	1
auto[3087007744:3221225471]	auto[0]	45	1			T17	1		T42	1		T28	1
auto[3087007744:3221225471]	auto[1]	50	1			T17	2		T28	1		T92	1
auto[3221225472:3355443199]	auto[0]	50	1			T42	2		T59	1		T27	1
auto[3221225472:3355443199]	auto[1]	56	1			T28	1		T57	1		T85	2
auto[3355443200:3489660927]	auto[0]	59	1			T17	1		T28	1		T92	1
auto[3355443200:3489660927]	auto[1]	52	1			T17	1		T93	1		T140	1
auto[3489660928:3623878655]	auto[0]	50	1			T39	1		T140	1		T24	1
auto[3489660928:3623878655]	auto[1]	45	1			T39	1		T92	1		T254	1
auto[3623878656:3758096383]	auto[0]	51	1			T39	1		T28	1		T140	1
auto[3623878656:3758096383]	auto[1]	73	1			T28	2		T85	1		T25	1
auto[3758096384:3892314111]	auto[0]	56	1			T26	1		T27	1		T57	1
auto[3758096384:3892314111]	auto[1]	53	1			T18	1		T112	1		T130	1
auto[3892314112:4026531839]	auto[0]	53	1			T17	1		T26	1		T28	1
auto[3892314112:4026531839]	auto[1]	60	1			T17	1		T28	1		T139	1
auto[4026531840:4160749567]	auto[0]	49	1			T17	2		T28	1		T24	1
auto[4026531840:4160749567]	auto[1]	52	1			T17	3		T26	1		T92	1
auto[4160749568:4294967295]	auto[0]	52	1			T28	1		T91	1		T254	1
auto[4160749568:4294967295]	auto[1]	63	1			T17	1		T28	1		T328	1