Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4402

1

T17

6

T18

6

T19

2

auto[1]

2070

1

T5

2

T6

2

T18

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	214	1			T75	2		T92	2		T30	2
auto[134217728:268435455]	172	1			T228	2		T55	2		T221	2
auto[268435456:402653183]	176	1			T27	2		T43	2		T138	2
auto[402653184:536870911]	192	1			T49	2		T43	2		T112	4
auto[536870912:671088639]	210	1			T27	2		T62	2		T153	4
auto[671088640:805306367]	212	1			T138	2		T30	2		T55	2
auto[805306368:939524095]	194	1			T6	2		T26	2		T53	2
auto[939524096:1073741823]	196	1			T37	2		T26	2		T39	2
auto[1073741824:1207959551]	202	1			T18	2		T26	2		T39	2
auto[1207959552:1342177279]	186	1			T18	2		T226	4		T112	2
auto[1342177280:1476395007]	242	1			T27	2		T112	2		T44	2
auto[1476395008:1610612735]	202	1			T135	2		T50	2		T218	2
auto[1610612736:1744830463]	198	1			T17	2		T18	2		T50	2
auto[1744830464:1879048191]	236	1			T17	2		T19	2		T43	2
auto[1879048192:2013265919]	178	1			T50	2		T138	2		T93	2
auto[2013265920:2147483647]	190	1			T65	2		T62	4		T56	4
auto[2147483648:2281701375]	188	1			T27	2		T151	2		T56	2
auto[2281701376:2415919103]	216	1			T17	2		T19	2		T88	2
auto[2415919104:2550136831]	178	1			T49	2		T43	2		T138	2
auto[2550136832:2684354559]	186	1			T218	2		T65	2		T93	2
auto[2684354560:2818572287]	212	1			T50	2		T152	2		T71	2
auto[2818572288:2952790015]	206	1			T39	2		T138	2		T218	2
auto[2952790016:3087007743]	202	1			T50	2		T223	2		T7	2
auto[3087007744:3221225471]	220	1			T5	2		T18	2		T19	2
auto[3221225472:3355443199]	204	1			T19	2		T37	2		T26	2
auto[3355443200:3489660927]	208	1			T19	2		T75	2		T112	2
auto[3489660928:3623878655]	204	1			T19	2		T50	2		T65	2
auto[3623878656:3758096383]	214	1			T50	2		T225	2		T125	2
auto[3758096384:3892314111]	190	1			T138	2		T75	2		T93	2
auto[3892314112:4026531839]	224	1			T88	2		T228	2		T225	2
auto[4026531840:4160749567]	196	1			T39	2		T27	2		T112	2
auto[4160749568:4294967295]	224	1			T18	2		T135	2		T27	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	144	1			T92	2		T30	2		T112	2
auto[0:134217727]	auto[1]	70	1			T75	2		T66	2		T69	2
auto[134217728:268435455]	auto[0]	118	1			T228	2		T55	2		T221	2
auto[134217728:268435455]	auto[1]	54	1			T69	2		T60	2		T309	2
auto[268435456:402653183]	auto[0]	110	1			T27	2		T43	2		T153	2
auto[268435456:402653183]	auto[1]	66	1			T138	2		T226	2		T66	2
auto[402653184:536870911]	auto[0]	128	1			T49	2		T43	2		T112	2
auto[402653184:536870911]	auto[1]	64	1			T112	2		T222	2		T309	2
auto[536870912:671088639]	auto[0]	152	1			T27	2		T62	2		T153	4
auto[536870912:671088639]	auto[1]	58	1			T393	2		T96	2		T264	2
auto[671088640:805306367]	auto[0]	166	1			T138	2		T55	2		T56	2
auto[671088640:805306367]	auto[1]	46	1			T30	2		T60	2		T309	2
auto[805306368:939524095]	auto[0]	122	1			T26	2		T225	2		T60	2
auto[805306368:939524095]	auto[1]	72	1			T6	2		T53	2		T44	2
auto[939524096:1073741823]	auto[0]	132	1			T26	2		T39	2		T218	2
auto[939524096:1073741823]	auto[1]	64	1			T37	2		T228	2		T226	2
auto[1073741824:1207959551]	auto[0]	134	1			T18	2		T26	2		T39	2
auto[1073741824:1207959551]	auto[1]	68	1			T237	2		T100	2		T141	2
auto[1207959552:1342177279]	auto[0]	124	1			T18	2		T112	2		T60	4
auto[1207959552:1342177279]	auto[1]	62	1			T226	4		T222	2		T64	6
auto[1342177280:1476395007]	auto[0]	172	1			T112	2		T44	2		T60	4
auto[1342177280:1476395007]	auto[1]	70	1			T27	2		T369	2		T139	2
auto[1476395008:1610612735]	auto[0]	140	1			T50	2		T218	2		T151	2
auto[1476395008:1610612735]	auto[1]	62	1			T135	2		T60	2		T73	2
auto[1610612736:1744830463]	auto[0]	148	1			T17	2		T50	2		T93	2
auto[1610612736:1744830463]	auto[1]	50	1			T18	2		T55	2		T62	2
auto[1744830464:1879048191]	auto[0]	158	1			T17	2		T92	2		T124	2
auto[1744830464:1879048191]	auto[1]	78	1			T19	2		T43	2		T93	2
auto[1879048192:2013265919]	auto[0]	108	1			T50	2		T138	2		T93	2
auto[1879048192:2013265919]	auto[1]	70	1			T62	2		T140	2		T261	2
auto[2013265920:2147483647]	auto[0]	134	1			T65	2		T62	2		T56	2
auto[2013265920:2147483647]	auto[1]	56	1			T62	2		T56	2		T80	2
auto[2147483648:2281701375]	auto[0]	126	1			T27	2		T151	2		T56	2
auto[2147483648:2281701375]	auto[1]	62	1			T60	2		T99	2		T81	2
auto[2281701376:2415919103]	auto[0]	140	1			T17	2		T19	2		T225	2
auto[2281701376:2415919103]	auto[1]	76	1			T88	2		T112	4		T79	2
auto[2415919104:2550136831]	auto[0]	130	1			T49	2		T124	2		T125	2
auto[2415919104:2550136831]	auto[1]	48	1			T43	2		T138	2		T112	2
auto[2550136832:2684354559]	auto[0]	134	1			T218	2		T65	2		T93	2
auto[2550136832:2684354559]	auto[1]	52	1			T152	2		T51	2		T425	2
auto[2684354560:2818572287]	auto[0]	140	1			T50	2		T71	2		T62	2
auto[2684354560:2818572287]	auto[1]	72	1			T152	2		T153	2		T61	2
auto[2818572288:2952790015]	auto[0]	134	1			T39	2		T218	2		T228	2
auto[2818572288:2952790015]	auto[1]	72	1			T138	2		T88	2		T31	2
auto[2952790016:3087007743]	auto[0]	148	1			T50	2		T60	6		T51	2
auto[2952790016:3087007743]	auto[1]	54	1			T223	2		T7	2		T98	2
auto[3087007744:3221225471]	auto[0]	156	1			T18	2		T92	2		T152	2
auto[3087007744:3221225471]	auto[1]	64	1			T5	2		T19	2		T112	2
auto[3221225472:3355443199]	auto[0]	140	1			T37	2		T26	2		T92	2
auto[3221225472:3355443199]	auto[1]	64	1			T19	2		T52	2		T151	2
auto[3355443200:3489660927]	auto[0]	150	1			T75	2		T112	2		T79	2
auto[3355443200:3489660927]	auto[1]	58	1			T19	2		T98	2		T102	2
auto[3489660928:3623878655]	auto[0]	136	1			T50	2		T44	2		T71	2
auto[3489660928:3623878655]	auto[1]	68	1			T19	2		T65	2		T112	2
auto[3623878656:3758096383]	auto[0]	150	1			T50	2		T225	2		T125	2
auto[3623878656:3758096383]	auto[1]	64	1			T152	2		T56	2		T61	2
auto[3758096384:3892314111]	auto[0]	118	1			T138	2		T93	2		T51	2
auto[3758096384:3892314111]	auto[1]	72	1			T75	2		T228	2		T424	2
auto[3892314112:4026531839]	auto[0]	144	1			T219	2		T112	2		T151	2
auto[3892314112:4026531839]	auto[1]	80	1			T88	2		T228	2		T225	2
auto[4026531840:4160749567]	auto[0]	120	1			T27	2		T112	2		T79	2
auto[4026531840:4160749567]	auto[1]	76	1			T39	2		T60	2		T425	2
auto[4160749568:4294967295]	auto[0]	146	1			T27	2		T125	2		T112	2
auto[4160749568:4294967295]	auto[1]	78	1			T18	2		T135	2		T54	2