Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4568

1

T2

10

T3

72

T4

4

auto[1]

2166

1

T3

30

T4

4

T11

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	202	1			T2	2		T3	8		T5	4
auto[134217728:268435455]	202	1			T51	2		T5	6		T40	4
auto[268435456:402653183]	200	1			T3	4		T15	2		T119	2
auto[402653184:536870911]	174	1			T3	2		T13	2		T15	4
auto[536870912:671088639]	238	1			T2	2		T3	2		T78	2
auto[671088640:805306367]	222	1			T3	2		T46	2		T62	2
auto[805306368:939524095]	206	1			T3	2		T4	2		T5	4
auto[939524096:1073741823]	190	1			T3	6		T13	2		T15	2
auto[1073741824:1207959551]	204	1			T3	4		T15	4		T119	2
auto[1207959552:1342177279]	218	1			T3	4		T13	2		T15	2
auto[1342177280:1476395007]	210	1			T3	4		T11	2		T77	2
auto[1476395008:1610612735]	182	1			T52	2		T51	2		T63	2
auto[1610612736:1744830463]	222	1			T3	2		T27	2		T51	2
auto[1744830464:1879048191]	228	1			T3	6		T21	2		T52	2
auto[1879048192:2013265919]	260	1			T3	8		T15	2		T77	2
auto[2013265920:2147483647]	186	1			T15	2		T33	2		T52	2
auto[2147483648:2281701375]	240	1			T2	4		T3	2		T15	4
auto[2281701376:2415919103]	192	1			T3	6		T77	2		T79	2
auto[2415919104:2550136831]	200	1			T3	4		T15	4		T51	2
auto[2550136832:2684354559]	226	1			T3	2		T15	2		T77	2
auto[2684354560:2818572287]	180	1			T4	2		T13	2		T118	2
auto[2818572288:2952790015]	238	1			T3	6		T4	2		T57	2
auto[2952790016:3087007743]	226	1			T3	2		T11	2		T78	2
auto[3087007744:3221225471]	230	1			T3	2		T11	2		T15	2
auto[3221225472:3355443199]	186	1			T15	2		T77	2		T118	2
auto[3355443200:3489660927]	194	1			T3	4		T15	2		T40	2
auto[3489660928:3623878655]	230	1			T3	4		T4	2		T15	2
auto[3623878656:3758096383]	202	1			T3	4		T27	2		T5	2
auto[3758096384:3892314111]	184	1			T3	2		T15	2		T119	2
auto[3892314112:4026531839]	194	1			T3	6		T78	2		T21	2
auto[4026531840:4160749567]	230	1			T2	2		T3	4		T79	2
auto[4160749568:4294967295]	238	1			T33	2		T79	2		T52	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	130	1			T2	2		T3	8		T5	4
auto[0:134217727]	auto[1]	72	1			T6	2		T82	2		T50	2
auto[134217728:268435455]	auto[0]	140	1			T51	2		T5	4		T40	2
auto[134217728:268435455]	auto[1]	62	1			T5	2		T40	2		T60	2
auto[268435456:402653183]	auto[0]	140	1			T3	2		T15	2		T119	2
auto[268435456:402653183]	auto[1]	60	1			T3	2		T5	2		T260	2
auto[402653184:536870911]	auto[0]	124	1			T15	2		T33	2		T77	2
auto[402653184:536870911]	auto[1]	50	1			T3	2		T13	2		T15	2
auto[536870912:671088639]	auto[0]	164	1			T2	2		T3	2		T78	2
auto[536870912:671088639]	auto[1]	74	1			T5	2		T50	2		T94	2
auto[671088640:805306367]	auto[0]	156	1			T3	2		T5	8		T41	2
auto[671088640:805306367]	auto[1]	66	1			T46	2		T62	2		T49	2
auto[805306368:939524095]	auto[0]	146	1			T3	2		T4	2		T5	4
auto[805306368:939524095]	auto[1]	60	1			T60	4		T342	2		T375	2
auto[939524096:1073741823]	auto[0]	126	1			T3	4		T119	2		T5	4
auto[939524096:1073741823]	auto[1]	64	1			T3	2		T13	2		T15	2
auto[1073741824:1207959551]	auto[0]	138	1			T119	2		T46	2		T47	2
auto[1073741824:1207959551]	auto[1]	66	1			T3	4		T15	4		T5	2
auto[1207959552:1342177279]	auto[0]	148	1			T3	4		T13	2		T52	2
auto[1207959552:1342177279]	auto[1]	70	1			T15	2		T120	2		T42	2
auto[1342177280:1476395007]	auto[0]	136	1			T3	2		T11	2		T46	2
auto[1342177280:1476395007]	auto[1]	74	1			T3	2		T77	2		T60	2
auto[1476395008:1610612735]	auto[0]	128	1			T52	2		T51	2		T63	2
auto[1476395008:1610612735]	auto[1]	54	1			T342	2		T194	2		T273	2
auto[1610612736:1744830463]	auto[0]	156	1			T3	2		T27	2		T5	6
auto[1610612736:1744830463]	auto[1]	66	1			T51	2		T6	2		T183	2
auto[1744830464:1879048191]	auto[0]	164	1			T3	6		T21	2		T52	2
auto[1744830464:1879048191]	auto[1]	64	1			T5	2		T183	2		T249	2
auto[1879048192:2013265919]	auto[0]	180	1			T3	6		T77	2		T79	2
auto[1879048192:2013265919]	auto[1]	80	1			T3	2		T15	2		T40	2
auto[2013265920:2147483647]	auto[0]	108	1			T15	2		T33	2		T40	2
auto[2013265920:2147483647]	auto[1]	78	1			T52	2		T231	2		T40	2
auto[2147483648:2281701375]	auto[0]	190	1			T2	4		T3	2		T15	2
auto[2147483648:2281701375]	auto[1]	50	1			T15	2		T33	2		T52	2
auto[2281701376:2415919103]	auto[0]	118	1			T3	4		T79	2		T113	2
auto[2281701376:2415919103]	auto[1]	74	1			T3	2		T77	2		T47	2
auto[2415919104:2550136831]	auto[0]	150	1			T3	2		T15	4		T60	2
auto[2415919104:2550136831]	auto[1]	50	1			T3	2		T51	2		T342	2
auto[2550136832:2684354559]	auto[0]	158	1			T3	2		T15	2		T77	2
auto[2550136832:2684354559]	auto[1]	68	1			T57	2		T5	2		T40	2
auto[2684354560:2818572287]	auto[0]	124	1			T118	2		T52	2		T18	2
auto[2684354560:2818572287]	auto[1]	56	1			T4	2		T13	2		T6	2
auto[2818572288:2952790015]	auto[0]	154	1			T3	2		T4	2		T57	2
auto[2818572288:2952790015]	auto[1]	84	1			T3	4		T74	2		T76	2
auto[2952790016:3087007743]	auto[0]	148	1			T3	2		T11	2		T78	2
auto[2952790016:3087007743]	auto[1]	78	1			T21	2		T113	2		T74	2
auto[3087007744:3221225471]	auto[0]	144	1			T3	2		T15	2		T118	2
auto[3087007744:3221225471]	auto[1]	86	1			T11	2		T51	2		T183	2
auto[3221225472:3355443199]	auto[0]	128	1			T118	2		T5	6		T183	2
auto[3221225472:3355443199]	auto[1]	58	1			T15	2		T77	2		T27	2
auto[3355443200:3489660927]	auto[0]	122	1			T3	4		T60	2		T183	2
auto[3355443200:3489660927]	auto[1]	72	1			T15	2		T40	2		T60	2
auto[3489660928:3623878655]	auto[0]	156	1			T3	2		T79	2		T47	2
auto[3489660928:3623878655]	auto[1]	74	1			T3	2		T4	2		T15	2
auto[3623878656:3758096383]	auto[0]	142	1			T3	2		T27	2		T5	2
auto[3623878656:3758096383]	auto[1]	60	1			T3	2		T134	2		T22	2
auto[3758096384:3892314111]	auto[0]	104	1			T15	2		T121	2		T60	2
auto[3758096384:3892314111]	auto[1]	80	1			T3	2		T119	2		T6	2
auto[3892314112:4026531839]	auto[0]	134	1			T3	4		T78	2		T21	2
auto[3892314112:4026531839]	auto[1]	60	1			T3	2		T50	2		T94	2
auto[4026531840:4160749567]	auto[0]	146	1			T2	2		T3	4		T79	2
auto[4026531840:4160749567]	auto[1]	84	1			T42	2		T63	2		T250	2
auto[4160749568:4294967295]	auto[0]	166	1			T52	2		T57	2		T51	2
auto[4160749568:4294967295]	auto[1]	72	1			T33	2		T79	2		T51	2