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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1546 1 T2 7 T15 4 T17 3
auto[1] 1752 1 T2 1 T5 2 T16 1


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 85 1 T222 1 T39 2 T86 1
auto[134217728:268435455] 93 1 T5 1 T17 2 T18 1
auto[268435456:402653183] 109 1 T36 1 T165 1 T37 1
auto[402653184:536870911] 94 1 T18 1 T88 1 T165 1
auto[536870912:671088639] 113 1 T19 1 T37 1 T131 2
auto[671088640:805306367] 84 1 T88 1 T50 1 T165 1
auto[805306368:939524095] 81 1 T88 1 T150 1 T39 1
auto[939524096:1073741823] 123 1 T2 1 T129 1 T51 1
auto[1073741824:1207959551] 114 1 T27 1 T165 1 T37 1
auto[1207959552:1342177279] 106 1 T2 1 T88 1 T222 1
auto[1342177280:1476395007] 111 1 T130 1 T51 1 T38 1
auto[1476395008:1610612735] 115 1 T15 1 T165 1 T130 1
auto[1610612736:1744830463] 108 1 T226 1 T39 2 T28 1
auto[1744830464:1879048191] 96 1 T46 1 T130 1 T51 1
auto[1879048192:2013265919] 102 1 T15 1 T27 1 T30 1
auto[2013265920:2147483647] 113 1 T2 1 T18 1 T222 1
auto[2147483648:2281701375] 105 1 T15 1 T16 1 T47 1
auto[2281701376:2415919103] 100 1 T88 2 T50 1 T38 1
auto[2415919104:2550136831] 105 1 T2 1 T17 1 T38 1
auto[2550136832:2684354559] 99 1 T5 1 T18 2 T49 1
auto[2684354560:2818572287] 114 1 T18 1 T88 1 T37 1
auto[2818572288:2952790015] 98 1 T17 1 T36 1 T85 1
auto[2952790016:3087007743] 83 1 T18 1 T28 1 T86 1
auto[3087007744:3221225471] 106 1 T28 2 T225 1 T230 1
auto[3221225472:3355443199] 113 1 T15 1 T37 1 T226 1
auto[3355443200:3489660927] 105 1 T88 1 T55 1 T59 3
auto[3489660928:3623878655] 101 1 T129 1 T222 1 T51 1
auto[3623878656:3758096383] 104 1 T2 2 T130 1 T47 1
auto[3758096384:3892314111] 87 1 T17 1 T18 1 T20 1
auto[3892314112:4026531839] 96 1 T2 1 T49 1 T39 1
auto[4026531840:4160749567] 132 1 T2 1 T51 1 T59 2
auto[4160749568:4294967295] 103 1 T150 1 T39 1 T28 1


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 40 1 T222 1 T39 2 T86 1
auto[0:134217727] auto[1] 45 1 T223 1 T62 1 T216 1
auto[134217728:268435455] auto[0] 34 1 T17 1 T8 1 T309 1
auto[134217728:268435455] auto[1] 59 1 T5 1 T17 1 T18 1
auto[268435456:402653183] auto[0] 50 1 T165 1 T37 1 T28 1
auto[268435456:402653183] auto[1] 59 1 T36 1 T224 1 T7 1
auto[402653184:536870911] auto[0] 42 1 T18 1 T88 1 T165 1
auto[402653184:536870911] auto[1] 52 1 T130 1 T150 1 T74 1
auto[536870912:671088639] auto[0] 57 1 T37 1 T39 1 T86 2
auto[536870912:671088639] auto[1] 56 1 T19 1 T131 2 T223 1
auto[671088640:805306367] auto[0] 39 1 T165 1 T150 1 T48 1
auto[671088640:805306367] auto[1] 45 1 T88 1 T50 1 T7 1
auto[805306368:939524095] auto[0] 41 1 T88 1 T150 1 T39 1
auto[805306368:939524095] auto[1] 40 1 T85 1 T230 1 T62 2
auto[939524096:1073741823] auto[0] 50 1 T129 1 T38 1 T39 1
auto[939524096:1073741823] auto[1] 73 1 T2 1 T51 1 T59 1
auto[1073741824:1207959551] auto[0] 49 1 T27 1 T37 1 T55 1
auto[1073741824:1207959551] auto[1] 65 1 T165 1 T72 1 T269 1
auto[1207959552:1342177279] auto[0] 49 1 T2 1 T88 1 T47 1
auto[1207959552:1342177279] auto[1] 57 1 T222 1 T62 1 T311 1
auto[1342177280:1476395007] auto[0] 45 1 T38 1 T62 2 T155 1
auto[1342177280:1476395007] auto[1] 66 1 T130 1 T51 1 T29 1
auto[1476395008:1610612735] auto[0] 56 1 T15 1 T130 1 T38 1
auto[1476395008:1610612735] auto[1] 59 1 T165 1 T87 2 T225 1
auto[1610612736:1744830463] auto[0] 51 1 T226 1 T39 2 T28 1
auto[1610612736:1744830463] auto[1] 57 1 T82 1 T85 1 T225 1
auto[1744830464:1879048191] auto[0] 45 1 T46 1 T28 1 T224 1
auto[1744830464:1879048191] auto[1] 51 1 T130 1 T51 1 T131 1
auto[1879048192:2013265919] auto[0] 50 1 T15 1 T27 1 T224 1
auto[1879048192:2013265919] auto[1] 52 1 T30 1 T269 1 T63 1
auto[2013265920:2147483647] auto[0] 62 1 T2 1 T47 1 T39 2
auto[2013265920:2147483647] auto[1] 51 1 T18 1 T222 1 T62 1
auto[2147483648:2281701375] auto[0] 45 1 T15 1 T47 1 T38 1
auto[2147483648:2281701375] auto[1] 60 1 T16 1 T87 1 T72 1
auto[2281701376:2415919103] auto[0] 46 1 T88 2 T38 1 T422 1
auto[2281701376:2415919103] auto[1] 54 1 T50 1 T65 1 T379 1
auto[2415919104:2550136831] auto[0] 50 1 T2 1 T17 1 T28 1
auto[2415919104:2550136831] auto[1] 55 1 T38 1 T62 1 T7 1
auto[2550136832:2684354559] auto[0] 44 1 T28 1 T48 1 T223 1
auto[2550136832:2684354559] auto[1] 55 1 T5 1 T18 2 T49 1
auto[2684354560:2818572287] auto[0] 52 1 T37 1 T131 1 T38 1
auto[2684354560:2818572287] auto[1] 62 1 T18 1 T88 1 T62 1
auto[2818572288:2952790015] auto[0] 43 1 T153 1 T7 2 T99 1
auto[2818572288:2952790015] auto[1] 55 1 T17 1 T36 1 T85 1
auto[2952790016:3087007743] auto[0] 36 1 T18 1 T28 1 T86 1
auto[2952790016:3087007743] auto[1] 47 1 T269 1 T62 2 T65 2
auto[3087007744:3221225471] auto[0] 49 1 T28 1 T62 1 T7 1
auto[3087007744:3221225471] auto[1] 57 1 T28 1 T225 1 T230 1
auto[3221225472:3355443199] auto[0] 56 1 T15 1 T37 1 T29 1
auto[3221225472:3355443199] auto[1] 57 1 T226 1 T151 1 T72 1
auto[3355443200:3489660927] auto[0] 55 1 T88 1 T55 1 T59 2
auto[3355443200:3489660927] auto[1] 50 1 T59 1 T38 1 T28 2
auto[3489660928:3623878655] auto[0] 54 1 T222 1 T51 1 T151 1
auto[3489660928:3623878655] auto[1] 47 1 T129 1 T62 1 T7 1
auto[3623878656:3758096383] auto[0] 61 1 T2 2 T130 1 T62 2
auto[3623878656:3758096383] auto[1] 43 1 T47 1 T48 1 T7 1
auto[3758096384:3892314111] auto[0] 36 1 T17 1 T20 1 T48 1
auto[3758096384:3892314111] auto[1] 51 1 T18 1 T226 1 T150 1
auto[3892314112:4026531839] auto[0] 53 1 T2 1 T39 1 T28 1
auto[3892314112:4026531839] auto[1] 43 1 T49 1 T62 1 T93 1
auto[4026531840:4160749567] auto[0] 62 1 T2 1 T59 2 T62 1
auto[4026531840:4160749567] auto[1] 70 1 T51 1 T38 1 T28 1
auto[4160749568:4294967295] auto[0] 44 1 T39 1 T28 1 T225 1
auto[4160749568:4294967295] auto[1] 59 1 T150 1 T152 1 T223 1

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