Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4496

1

T2

14

T15

4

T16

2

auto[1]

2100

1

T2

2

T5

4

T15

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	206	1			T2	2		T226	2		T46	2
auto[134217728:268435455]	236	1			T18	2		T88	2		T59	2
auto[268435456:402653183]	206	1			T51	2		T38	2		T28	2
auto[402653184:536870911]	242	1			T39	2		T28	2		T151	2
auto[536870912:671088639]	210	1			T2	2		T18	2		T37	2
auto[671088640:805306367]	202	1			T2	2		T37	2		T47	2
auto[805306368:939524095]	260	1			T50	2		T29	2		T28	4
auto[939524096:1073741823]	236	1			T19	2		T37	2		T222	2
auto[1073741824:1207959551]	240	1			T15	2		T88	2		T222	2
auto[1207959552:1342177279]	238	1			T129	2		T165	2		T150	4
auto[1342177280:1476395007]	178	1			T17	2		T88	2		T36	2
auto[1476395008:1610612735]	222	1			T2	2		T15	2		T18	2
auto[1610612736:1744830463]	222	1			T17	2		T18	2		T130	2
auto[1744830464:1879048191]	164	1			T29	2		T28	4		T86	2
auto[1879048192:2013265919]	214	1			T18	2		T51	2		T131	2
auto[2013265920:2147483647]	240	1			T2	2		T27	2		T88	2
auto[2147483648:2281701375]	214	1			T88	2		T165	2		T55	2
auto[2281701376:2415919103]	208	1			T17	2		T237	2		T62	4
auto[2415919104:2550136831]	176	1			T18	2		T37	2		T28	4
auto[2550136832:2684354559]	184	1			T18	2		T151	2		T62	2
auto[2684354560:2818572287]	208	1			T2	2		T165	2		T38	2
auto[2818572288:2952790015]	150	1			T88	2		T165	2		T37	2
auto[2952790016:3087007743]	184	1			T5	2		T15	2		T16	2
auto[3087007744:3221225471]	172	1			T5	2		T17	2		T131	2
auto[3221225472:3355443199]	186	1			T15	2		T17	2		T47	2
auto[3355443200:3489660927]	204	1			T20	2		T38	2		T153	2
auto[3489660928:3623878655]	190	1			T18	2		T88	2		T59	2
auto[3623878656:3758096383]	220	1			T27	2		T49	2		T47	2
auto[3758096384:3892314111]	214	1			T2	2		T49	2		T30	2
auto[3892314112:4026531839]	214	1			T222	2		T59	2		T48	2
auto[4026531840:4160749567]	162	1			T130	2		T59	2		T150	2
auto[4160749568:4294967295]	194	1			T2	2		T50	2		T29	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	142	1			T2	2		T226	2		T130	2
auto[0:134217727]	auto[1]	64	1			T46	2		T72	2		T154	2
auto[134217728:268435455]	auto[0]	148	1			T88	2		T38	2		T72	2
auto[134217728:268435455]	auto[1]	88	1			T18	2		T59	2		T28	2
auto[268435456:402653183]	auto[0]	136	1			T51	2		T38	2		T237	2
auto[268435456:402653183]	auto[1]	70	1			T28	2		T151	2		T58	2
auto[402653184:536870911]	auto[0]	168	1			T28	2		T151	2		T225	4
auto[402653184:536870911]	auto[1]	74	1			T39	2		T228	4		T311	2
auto[536870912:671088639]	auto[0]	146	1			T2	2		T18	2		T37	2
auto[536870912:671088639]	auto[1]	64	1			T223	2		T7	2		T154	2
auto[671088640:805306367]	auto[0]	134	1			T2	2		T37	2		T28	2
auto[671088640:805306367]	auto[1]	68	1			T47	2		T87	2		T237	2
auto[805306368:939524095]	auto[0]	168	1			T28	2		T48	2		T86	2
auto[805306368:939524095]	auto[1]	92	1			T50	2		T29	2		T28	2
auto[939524096:1073741823]	auto[0]	152	1			T222	2		T51	2		T38	2
auto[939524096:1073741823]	auto[1]	84	1			T19	2		T37	2		T28	2
auto[1073741824:1207959551]	auto[0]	170	1			T222	2		T226	2		T38	2
auto[1073741824:1207959551]	auto[1]	70	1			T15	2		T88	2		T7	2
auto[1207959552:1342177279]	auto[0]	172	1			T129	2		T165	2		T150	2
auto[1207959552:1342177279]	auto[1]	66	1			T150	2		T225	2		T62	2
auto[1342177280:1476395007]	auto[0]	106	1			T88	2		T165	2		T131	4
auto[1342177280:1476395007]	auto[1]	72	1			T17	2		T36	2		T48	2
auto[1476395008:1610612735]	auto[0]	154	1			T2	2		T18	2		T222	2
auto[1476395008:1610612735]	auto[1]	68	1			T15	2		T28	2		T62	2
auto[1610612736:1744830463]	auto[0]	158	1			T18	2		T130	2		T39	2
auto[1610612736:1744830463]	auto[1]	64	1			T17	2		T29	2		T228	2
auto[1744830464:1879048191]	auto[0]	124	1			T28	4		T86	2		T223	2
auto[1744830464:1879048191]	auto[1]	40	1			T29	2		T225	2		T7	2
auto[1879048192:2013265919]	auto[0]	144	1			T18	2		T51	2		T131	2
auto[1879048192:2013265919]	auto[1]	70	1			T39	2		T232	2		T62	2
auto[2013265920:2147483647]	auto[0]	154	1			T2	2		T88	2		T226	2
auto[2013265920:2147483647]	auto[1]	86	1			T27	2		T97	2		T296	2
auto[2147483648:2281701375]	auto[0]	158	1			T88	2		T55	2		T59	2
auto[2147483648:2281701375]	auto[1]	56	1			T165	2		T130	2		T218	2
auto[2281701376:2415919103]	auto[0]	160	1			T17	2		T7	2		T155	2
auto[2281701376:2415919103]	auto[1]	48	1			T237	2		T62	4		T97	2
auto[2415919104:2550136831]	auto[0]	124	1			T18	2		T28	4		T7	6
auto[2415919104:2550136831]	auto[1]	52	1			T37	2		T63	2		T93	2
auto[2550136832:2684354559]	auto[0]	122	1			T18	2		T7	8		T58	2
auto[2550136832:2684354559]	auto[1]	62	1			T151	2		T62	2		T216	2
auto[2684354560:2818572287]	auto[0]	134	1			T2	2		T38	2		T39	2
auto[2684354560:2818572287]	auto[1]	74	1			T165	2		T28	2		T272	2
auto[2818572288:2952790015]	auto[0]	120	1			T88	2		T165	2		T37	2
auto[2818572288:2952790015]	auto[1]	30	1			T7	2		T94	2		T140	2
auto[2952790016:3087007743]	auto[0]	122	1			T15	2		T16	2		T88	2
auto[2952790016:3087007743]	auto[1]	62	1			T5	2		T129	2		T38	2
auto[3087007744:3221225471]	auto[0]	106	1			T17	2		T39	2		T62	4
auto[3087007744:3221225471]	auto[1]	66	1			T5	2		T131	2		T96	2
auto[3221225472:3355443199]	auto[0]	140	1			T15	2		T17	2		T47	2
auto[3221225472:3355443199]	auto[1]	46	1			T269	2		T234	2		T124	2
auto[3355443200:3489660927]	auto[0]	136	1			T20	2		T153	2		T62	2
auto[3355443200:3489660927]	auto[1]	68	1			T38	2		T62	2		T7	2
auto[3489660928:3623878655]	auto[0]	126	1			T18	2		T59	2		T39	2
auto[3489660928:3623878655]	auto[1]	64	1			T88	2		T152	2		T230	2
auto[3623878656:3758096383]	auto[0]	150	1			T27	2		T47	2		T38	2
auto[3623878656:3758096383]	auto[1]	70	1			T49	2		T153	2		T62	2
auto[3758096384:3892314111]	auto[0]	138	1			T51	2		T59	2		T7	2
auto[3758096384:3892314111]	auto[1]	76	1			T2	2		T49	2		T30	2
auto[3892314112:4026531839]	auto[0]	152	1			T59	2		T72	2		T62	8
auto[3892314112:4026531839]	auto[1]	62	1			T222	2		T48	2		T230	2
auto[4026531840:4160749567]	auto[0]	102	1			T130	2		T59	2		T48	2
auto[4026531840:4160749567]	auto[1]	60	1			T150	2		T232	2		T218	2
auto[4160749568:4294967295]	auto[0]	130	1			T2	2		T28	2		T237	2
auto[4160749568:4294967295]	auto[1]	64	1			T50	2		T29	2		T151	2