Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6879

1

T1

13

T2

6

T3

10

auto[1]

299

1

T1

4

T2

4

T35

7

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	2865	1			T1	6		T2	3		T3	6
auto[134217728:268435455]	169	1			T1	1		T2	1		T139	1
auto[268435456:402653183]	151	1			T57	1		T36	1		T194	1
auto[402653184:536870911]	160	1			T1	1		T2	1		T26	1
auto[536870912:671088639]	160	1			T3	1		T36	2		T139	1
auto[671088640:805306367]	142	1			T1	1		T2	1		T54	1
auto[805306368:939524095]	140	1			T35	2		T139	1		T194	1
auto[939524096:1073741823]	136	1			T26	1		T36	2		T139	1
auto[1073741824:1207959551]	162	1			T5	1		T140	1		T55	1
auto[1207959552:1342177279]	132	1			T1	1		T15	2		T26	2
auto[1342177280:1476395007]	165	1			T2	1		T3	1		T27	2
auto[1476395008:1610612735]	143	1			T27	1		T57	1		T36	1
auto[1610612736:1744830463]	146	1			T27	1		T49	1		T37	1
auto[1744830464:1879048191]	129	1			T15	1		T27	2		T57	1
auto[1879048192:2013265919]	129	1			T1	2		T3	1		T26	1
auto[2013265920:2147483647]	126	1			T35	1		T27	1		T54	1
auto[2147483648:2281701375]	124	1			T3	1		T27	1		T139	1
auto[2281701376:2415919103]	114	1			T26	1		T37	1		T38	1
auto[2415919104:2550136831]	125	1			T1	1		T35	2		T36	1
auto[2550136832:2684354559]	128	1			T35	1		T206	1		T194	1
auto[2684354560:2818572287]	133	1			T2	1		T9	1		T139	2
auto[2818572288:2952790015]	131	1			T15	1		T26	2		T36	1
auto[2952790016:3087007743]	132	1			T1	1		T15	1		T27	1
auto[3087007744:3221225471]	137	1			T35	1		T27	2		T194	1
auto[3221225472:3355443199]	120	1			T1	1		T35	1		T9	1
auto[3355443200:3489660927]	148	1			T26	1		T35	1		T27	1
auto[3489660928:3623878655]	142	1			T27	1		T65	1		T57	2
auto[3623878656:3758096383]	140	1			T1	1		T15	1		T206	1
auto[3758096384:3892314111]	144	1			T1	1		T140	1		T37	2
auto[3892314112:4026531839]	126	1			T2	1		T35	1		T65	1
auto[4026531840:4160749567]	132	1			T2	1		T15	1		T57	1
auto[4160749568:4294967295]	147	1			T26	1		T57	1		T36	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	2855	1			T1	6		T2	3		T3	6
auto[0:134217727]	auto[1]	10	1			T148	1		T345	1		T365	2
auto[134217728:268435455]	auto[0]	156	1			T1	1		T2	1		T194	2
auto[134217728:268435455]	auto[1]	13	1			T139	1		T140	1		T275	1
auto[268435456:402653183]	auto[0]	143	1			T57	1		T36	1		T194	1
auto[268435456:402653183]	auto[1]	8	1			T262	1		T248	1		T300	1
auto[402653184:536870911]	auto[0]	150	1			T26	1		T49	1		T148	1
auto[402653184:536870911]	auto[1]	10	1			T1	1		T2	1		T35	1
auto[536870912:671088639]	auto[0]	147	1			T3	1		T36	2		T37	1
auto[536870912:671088639]	auto[1]	13	1			T139	1		T280	1		T275	1
auto[671088640:805306367]	auto[0]	137	1			T1	1		T2	1		T54	1
auto[671088640:805306367]	auto[1]	5	1			T319	1		T390	1		T365	1
auto[805306368:939524095]	auto[0]	131	1			T35	1		T139	1		T194	1
auto[805306368:939524095]	auto[1]	9	1			T35	1		T259	1		T319	2
auto[939524096:1073741823]	auto[0]	132	1			T26	1		T36	2		T139	1
auto[939524096:1073741823]	auto[1]	4	1			T275	1		T437	1		T438	1
auto[1073741824:1207959551]	auto[0]	154	1			T5	1		T140	1		T55	1
auto[1073741824:1207959551]	auto[1]	8	1			T262	1		T248	2		T436	2
auto[1207959552:1342177279]	auto[0]	119	1			T15	2		T26	2		T49	1
auto[1207959552:1342177279]	auto[1]	13	1			T1	1		T35	1		T319	1
auto[1342177280:1476395007]	auto[0]	153	1			T2	1		T3	1		T27	2
auto[1342177280:1476395007]	auto[1]	12	1			T259	2		T280	1		T433	1
auto[1476395008:1610612735]	auto[0]	126	1			T27	1		T57	1		T36	1
auto[1476395008:1610612735]	auto[1]	17	1			T275	1		T248	2		T436	1
auto[1610612736:1744830463]	auto[0]	135	1			T27	1		T49	1		T37	1
auto[1610612736:1744830463]	auto[1]	11	1			T280	1		T433	1		T436	1
auto[1744830464:1879048191]	auto[0]	127	1			T15	1		T27	2		T57	1
auto[1744830464:1879048191]	auto[1]	2	1			T352	1		T297	1		-	-
auto[1879048192:2013265919]	auto[0]	119	1			T1	1		T3	1		T26	1
auto[1879048192:2013265919]	auto[1]	10	1			T1	1		T259	1		T275	1
auto[2013265920:2147483647]	auto[0]	120	1			T27	1		T54	1		T57	1
auto[2013265920:2147483647]	auto[1]	6	1			T35	1		T319	1		T365	1
auto[2147483648:2281701375]	auto[0]	120	1			T3	1		T27	1		T38	1
auto[2147483648:2281701375]	auto[1]	4	1			T139	1		T371	1		T279	1
auto[2281701376:2415919103]	auto[0]	105	1			T26	1		T37	1		T38	1
auto[2281701376:2415919103]	auto[1]	9	1			T248	1		T253	1		T279	1
auto[2415919104:2550136831]	auto[0]	115	1			T1	1		T35	2		T36	1
auto[2415919104:2550136831]	auto[1]	10	1			T397	1		T262	1		T319	1
auto[2550136832:2684354559]	auto[0]	116	1			T206	1		T194	1		T37	1
auto[2550136832:2684354559]	auto[1]	12	1			T35	1		T285	1		T319	1
auto[2684354560:2818572287]	auto[0]	124	1			T9	1		T139	1		T6	1
auto[2684354560:2818572287]	auto[1]	9	1			T2	1		T139	1		T262	2
auto[2818572288:2952790015]	auto[0]	121	1			T15	1		T26	2		T36	1
auto[2818572288:2952790015]	auto[1]	10	1			T148	1		T390	1		T433	1
auto[2952790016:3087007743]	auto[0]	120	1			T15	1		T27	1		T194	1
auto[2952790016:3087007743]	auto[1]	12	1			T1	1		T259	1		T262	1
auto[3087007744:3221225471]	auto[0]	128	1			T27	2		T194	1		T51	1
auto[3087007744:3221225471]	auto[1]	9	1			T35	1		T262	2		T390	1
auto[3221225472:3355443199]	auto[0]	109	1			T1	1		T9	1		T57	1
auto[3221225472:3355443199]	auto[1]	11	1			T35	1		T259	1		T319	1
auto[3355443200:3489660927]	auto[0]	137	1			T26	1		T35	1		T27	1
auto[3355443200:3489660927]	auto[1]	11	1			T259	3		T285	1		T319	1
auto[3489660928:3623878655]	auto[0]	136	1			T27	1		T65	1		T57	2
auto[3489660928:3623878655]	auto[1]	6	1			T259	1		T319	1		T436	1
auto[3623878656:3758096383]	auto[0]	128	1			T1	1		T15	1		T206	1
auto[3623878656:3758096383]	auto[1]	12	1			T259	1		T319	1		T390	1
auto[3758096384:3892314111]	auto[0]	134	1			T1	1		T140	1		T37	2
auto[3758096384:3892314111]	auto[1]	10	1			T262	1		T319	1		T265	1
auto[3892314112:4026531839]	auto[0]	115	1			T35	1		T65	1		T36	1
auto[3892314112:4026531839]	auto[1]	11	1			T2	1		T259	2		T248	1
auto[4026531840:4160749567]	auto[0]	126	1			T15	1		T57	1		T36	1
auto[4026531840:4160749567]	auto[1]	6	1			T2	1		T259	1		T248	1
auto[4160749568:4294967295]	auto[0]	141	1			T26	1		T57	1		T36	1
auto[4160749568:4294967295]	auto[1]	6	1			T259	1		T285	1		T365	2