Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4686

1

T1

68

T3

8

T4

2

auto[1]

2342

1

T1

20

T3

2

T4

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	196	1			T1	2		T94	2		T23	2
auto[134217728:268435455]	198	1			T1	2		T16	2		T23	2
auto[268435456:402653183]	194	1			T1	4		T188	2		T190	2
auto[402653184:536870911]	222	1			T1	2		T24	2		T134	2
auto[536870912:671088639]	180	1			T1	2		T3	2		T24	2
auto[671088640:805306367]	204	1			T1	2		T3	2		T13	2
auto[805306368:939524095]	180	1			T1	2		T50	2		T47	2
auto[939524096:1073741823]	230	1			T1	2		T144	2		T36	2
auto[1073741824:1207959551]	240	1			T1	10		T13	2		T14	2
auto[1207959552:1342177279]	226	1			T1	4		T14	2		T38	4
auto[1342177280:1476395007]	248	1			T1	4		T16	2		T191	2
auto[1476395008:1610612735]	224	1			T190	2		T43	2		T47	4
auto[1610612736:1744830463]	188	1			T16	2		T37	4		T43	2
auto[1744830464:1879048191]	232	1			T198	2		T54	2		T97	2
auto[1879048192:2013265919]	200	1			T1	2		T3	2		T4	2
auto[2013265920:2147483647]	182	1			T1	2		T16	2		T60	2
auto[2147483648:2281701375]	242	1			T1	2		T94	2		T43	2
auto[2281701376:2415919103]	202	1			T1	2		T14	2		T191	2
auto[2415919104:2550136831]	242	1			T1	6		T16	2		T24	2
auto[2550136832:2684354559]	220	1			T1	4		T16	2		T23	2
auto[2684354560:2818572287]	220	1			T1	6		T3	4		T14	4
auto[2818572288:2952790015]	254	1			T1	2		T94	2		T24	2
auto[2952790016:3087007743]	232	1			T23	2		T144	2		T128	2
auto[3087007744:3221225471]	198	1			T4	2		T37	2		T43	2
auto[3221225472:3355443199]	212	1			T1	2		T13	2		T24	2
auto[3355443200:3489660927]	202	1			T1	2		T38	2		T201	4
auto[3489660928:3623878655]	270	1			T1	6		T37	2		T38	2
auto[3623878656:3758096383]	230	1			T1	6		T144	2		T50	2
auto[3758096384:3892314111]	240	1			T191	2		T128	4		T47	4
auto[3892314112:4026531839]	200	1			T1	2		T144	2		T43	2
auto[4026531840:4160749567]	274	1			T1	4		T4	2		T37	2
auto[4160749568:4294967295]	246	1			T1	4		T188	2		T36	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	136	1			T1	2		T94	2		T23	2
auto[0:134217727]	auto[1]	60	1			T37	2		T81	2		T60	2
auto[134217728:268435455]	auto[0]	126	1			T1	2		T16	2		T23	2
auto[134217728:268435455]	auto[1]	72	1			T47	2		T95	2		T63	2
auto[268435456:402653183]	auto[0]	130	1			T1	2		T188	2		T190	2
auto[268435456:402653183]	auto[1]	64	1			T1	2		T47	4		T96	2
auto[402653184:536870911]	auto[0]	146	1			T1	2		T24	2		T63	2
auto[402653184:536870911]	auto[1]	76	1			T134	2		T231	2		T63	2
auto[536870912:671088639]	auto[0]	118	1			T1	2		T3	2		T24	2
auto[536870912:671088639]	auto[1]	62	1			T47	4		T349	2		T273	2
auto[671088640:805306367]	auto[0]	126	1			T1	2		T13	2		T201	2
auto[671088640:805306367]	auto[1]	78	1			T3	2		T47	4		T130	2
auto[805306368:939524095]	auto[0]	128	1			T1	2		T50	2		T47	2
auto[805306368:939524095]	auto[1]	52	1			T199	2		T82	2		T185	2
auto[939524096:1073741823]	auto[0]	164	1			T1	2		T144	2		T36	2
auto[939524096:1073741823]	auto[1]	66	1			T197	2		T284	2		T52	2
auto[1073741824:1207959551]	auto[0]	148	1			T1	8		T13	2		T14	2
auto[1073741824:1207959551]	auto[1]	92	1			T1	2		T134	2		T40	2
auto[1207959552:1342177279]	auto[0]	138	1			T1	2		T14	2		T38	2
auto[1207959552:1342177279]	auto[1]	88	1			T1	2		T38	2		T43	2
auto[1342177280:1476395007]	auto[0]	184	1			T1	2		T16	2		T191	2
auto[1342177280:1476395007]	auto[1]	64	1			T1	2		T122	2		T60	2
auto[1476395008:1610612735]	auto[0]	148	1			T190	2		T43	2		T47	2
auto[1476395008:1610612735]	auto[1]	76	1			T47	2		T194	2		T18	2
auto[1610612736:1744830463]	auto[0]	136	1			T16	2		T37	4		T47	2
auto[1610612736:1744830463]	auto[1]	52	1			T43	2		T134	2		T278	2
auto[1744830464:1879048191]	auto[0]	154	1			T198	2		T54	2		T97	2
auto[1744830464:1879048191]	auto[1]	78	1			T82	2		T5	2		T197	2
auto[1879048192:2013265919]	auto[0]	130	1			T1	2		T3	2		T4	2
auto[1879048192:2013265919]	auto[1]	70	1			T60	2		T197	2		T385	2
auto[2013265920:2147483647]	auto[0]	126	1			T1	2		T60	2		T233	2
auto[2013265920:2147483647]	auto[1]	56	1			T16	2		T197	2		T209	2
auto[2147483648:2281701375]	auto[0]	164	1			T94	2		T43	2		T47	6
auto[2147483648:2281701375]	auto[1]	78	1			T1	2		T47	2		T232	2
auto[2281701376:2415919103]	auto[0]	122	1			T1	2		T14	2		T191	2
auto[2281701376:2415919103]	auto[1]	80	1			T97	2		T134	2		T5	2
auto[2415919104:2550136831]	auto[0]	176	1			T1	6		T16	2		T24	2
auto[2415919104:2550136831]	auto[1]	66	1			T96	2		T125	2		T56	2
auto[2550136832:2684354559]	auto[0]	148	1			T1	2		T16	2		T23	2
auto[2550136832:2684354559]	auto[1]	72	1			T1	2		T47	4		T60	2
auto[2684354560:2818572287]	auto[0]	138	1			T1	4		T3	4		T14	4
auto[2684354560:2818572287]	auto[1]	82	1			T1	2		T133	2		T194	2
auto[2818572288:2952790015]	auto[0]	178	1			T1	2		T94	2		T24	2
auto[2818572288:2952790015]	auto[1]	76	1			T48	2		T52	2		T138	2
auto[2952790016:3087007743]	auto[0]	166	1			T23	2		T128	2		T47	2
auto[2952790016:3087007743]	auto[1]	66	1			T144	2		T82	2		T209	2
auto[3087007744:3221225471]	auto[0]	120	1			T47	2		T122	2		T60	2
auto[3087007744:3221225471]	auto[1]	78	1			T4	2		T37	2		T43	2
auto[3221225472:3355443199]	auto[0]	140	1			T1	2		T49	2		T198	2
auto[3221225472:3355443199]	auto[1]	72	1			T13	2		T24	2		T47	4
auto[3355443200:3489660927]	auto[0]	134	1			T38	2		T201	4		T47	4
auto[3355443200:3489660927]	auto[1]	68	1			T1	2		T82	2		T404	2
auto[3489660928:3623878655]	auto[0]	174	1			T1	4		T38	2		T133	2
auto[3489660928:3623878655]	auto[1]	96	1			T1	2		T37	2		T60	2
auto[3623878656:3758096383]	auto[0]	140	1			T1	4		T144	2		T50	2
auto[3623878656:3758096383]	auto[1]	90	1			T1	2		T82	2		T56	2
auto[3758096384:3892314111]	auto[0]	158	1			T191	2		T128	2		T145	2
auto[3758096384:3892314111]	auto[1]	82	1			T128	2		T47	4		T60	2
auto[3892314112:4026531839]	auto[0]	134	1			T1	2		T43	2		T232	2
auto[3892314112:4026531839]	auto[1]	66	1			T144	2		T47	2		T95	2
auto[4026531840:4160749567]	auto[0]	186	1			T1	4		T201	2		T47	4
auto[4026531840:4160749567]	auto[1]	88	1			T4	2		T37	2		T95	2
auto[4160749568:4294967295]	auto[0]	170	1			T1	4		T188	2		T36	2
auto[4160749568:4294967295]	auto[1]	76	1			T201	2		T60	2		T18	2