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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4440 1 T1 4 T17 16 T18 74
auto[1] 2042 1 T1 4 T17 2 T18 28



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 228 1 T49 4 T26 2 T48 6
auto[134217728:268435455] 194 1 T17 2 T18 2 T33 2
auto[268435456:402653183] 196 1 T18 4 T78 2 T36 2
auto[402653184:536870911] 216 1 T17 2 T18 2 T33 2
auto[536870912:671088639] 216 1 T18 6 T55 2 T49 2
auto[671088640:805306367] 240 1 T17 4 T18 2 T48 2
auto[805306368:939524095] 200 1 T1 2 T18 6 T36 2
auto[939524096:1073741823] 166 1 T17 2 T18 6 T27 2
auto[1073741824:1207959551] 186 1 T18 8 T19 2 T117 2
auto[1207959552:1342177279] 166 1 T18 6 T55 2 T69 2
auto[1342177280:1476395007] 210 1 T18 4 T79 2 T36 2
auto[1476395008:1610612735] 192 1 T19 2 T33 2 T117 2
auto[1610612736:1744830463] 206 1 T1 2 T18 2 T78 2
auto[1744830464:1879048191] 196 1 T18 4 T33 2 T78 2
auto[1879048192:2013265919] 186 1 T18 6 T21 2 T28 6
auto[2013265920:2147483647] 210 1 T18 4 T49 2 T56 2
auto[2147483648:2281701375] 192 1 T79 2 T133 2 T45 2
auto[2281701376:2415919103] 208 1 T17 4 T135 2 T48 2
auto[2415919104:2550136831] 166 1 T48 2 T97 2 T150 2
auto[2550136832:2684354559] 190 1 T18 2 T97 2 T5 6
auto[2684354560:2818572287] 208 1 T18 4 T36 2 T135 2
auto[2818572288:2952790015] 228 1 T1 2 T18 2 T33 2
auto[2952790016:3087007743] 170 1 T17 2 T27 2 T237 2
auto[3087007744:3221225471] 226 1 T1 2 T18 8 T27 2
auto[3221225472:3355443199] 212 1 T18 4 T48 2 T191 2
auto[3355443200:3489660927] 218 1 T18 4 T78 2 T398 2
auto[3489660928:3623878655] 230 1 T18 2 T117 2 T48 2
auto[3623878656:3758096383] 220 1 T19 4 T55 2 T50 2
auto[3758096384:3892314111] 202 1 T18 4 T79 2 T55 2
auto[3892314112:4026531839] 214 1 T17 2 T18 4 T78 2
auto[4026531840:4160749567] 172 1 T18 2 T78 2 T191 2
auto[4160749568:4294967295] 218 1 T18 4 T8 2 T56 2



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 164 1 T49 2 T26 2 T48 2
auto[0:134217727] auto[1] 64 1 T49 2 T48 4 T151 2
auto[134217728:268435455] auto[0] 136 1 T17 2 T237 2 T227 2
auto[134217728:268435455] auto[1] 58 1 T18 2 T33 2 T36 2
auto[268435456:402653183] auto[0] 142 1 T18 2 T78 2 T36 2
auto[268435456:402653183] auto[1] 54 1 T18 2 T237 2 T61 2
auto[402653184:536870911] auto[0] 146 1 T17 2 T18 2 T79 2
auto[402653184:536870911] auto[1] 70 1 T33 2 T60 2 T139 2
auto[536870912:671088639] auto[0] 150 1 T18 4 T26 2 T48 4
auto[536870912:671088639] auto[1] 66 1 T18 2 T55 2 T49 2
auto[671088640:805306367] auto[0] 178 1 T17 4 T18 2 T48 2
auto[671088640:805306367] auto[1] 62 1 T6 2 T140 2 T124 2
auto[805306368:939524095] auto[0] 122 1 T18 4 T36 2 T117 2
auto[805306368:939524095] auto[1] 78 1 T1 2 T18 2 T56 2
auto[939524096:1073741823] auto[0] 122 1 T17 2 T18 4 T48 2
auto[939524096:1073741823] auto[1] 44 1 T18 2 T27 2 T227 2
auto[1073741824:1207959551] auto[0] 122 1 T18 6 T19 2 T117 2
auto[1073741824:1207959551] auto[1] 64 1 T18 2 T56 2 T61 2
auto[1207959552:1342177279] auto[0] 108 1 T18 4 T55 2 T61 2
auto[1207959552:1342177279] auto[1] 58 1 T18 2 T69 2 T185 2
auto[1342177280:1476395007] auto[0] 142 1 T18 4 T79 2 T36 2
auto[1342177280:1476395007] auto[1] 68 1 T49 2 T237 2 T51 2
auto[1476395008:1610612735] auto[0] 120 1 T19 2 T33 2 T117 2
auto[1476395008:1610612735] auto[1] 72 1 T96 2 T48 2 T5 2
auto[1610612736:1744830463] auto[0] 150 1 T1 2 T18 2 T78 2
auto[1610612736:1744830463] auto[1] 56 1 T26 2 T56 2 T48 4
auto[1744830464:1879048191] auto[0] 132 1 T18 2 T78 2 T36 2
auto[1744830464:1879048191] auto[1] 64 1 T18 2 T33 2 T192 2
auto[1879048192:2013265919] auto[0] 132 1 T18 4 T28 4 T32 2
auto[1879048192:2013265919] auto[1] 54 1 T18 2 T21 2 T28 2
auto[2013265920:2147483647] auto[0] 126 1 T18 4 T49 2 T48 2
auto[2013265920:2147483647] auto[1] 84 1 T56 2 T192 2 T20 2
auto[2147483648:2281701375] auto[0] 148 1 T79 2 T133 2 T45 2
auto[2147483648:2281701375] auto[1] 44 1 T5 4 T244 2 T102 2
auto[2281701376:2415919103] auto[0] 154 1 T17 2 T398 2 T5 6
auto[2281701376:2415919103] auto[1] 54 1 T17 2 T135 2 T48 2
auto[2415919104:2550136831] auto[0] 112 1 T97 2 T150 2 T5 2
auto[2415919104:2550136831] auto[1] 54 1 T48 2 T252 2 T5 2
auto[2550136832:2684354559] auto[0] 144 1 T5 6 T139 2 T403 2
auto[2550136832:2684354559] auto[1] 46 1 T18 2 T97 2 T72 2
auto[2684354560:2818572287] auto[0] 128 1 T18 2 T48 2 T97 2
auto[2684354560:2818572287] auto[1] 80 1 T18 2 T36 2 T135 2
auto[2818572288:2952790015] auto[0] 144 1 T18 2 T79 2 T36 2
auto[2818572288:2952790015] auto[1] 84 1 T1 2 T33 2 T78 2
auto[2952790016:3087007743] auto[0] 114 1 T17 2 T27 2 T237 2
auto[2952790016:3087007743] auto[1] 56 1 T61 4 T6 2 T242 2
auto[3087007744:3221225471] auto[0] 156 1 T1 2 T18 6 T27 2
auto[3087007744:3221225471] auto[1] 70 1 T18 2 T56 2 T48 2
auto[3221225472:3355443199] auto[0] 154 1 T18 4 T48 2 T191 2
auto[3221225472:3355443199] auto[1] 58 1 T61 2 T273 2 T282 2
auto[3355443200:3489660927] auto[0] 156 1 T18 2 T78 2 T398 2
auto[3355443200:3489660927] auto[1] 62 1 T18 2 T69 2 T5 2
auto[3489660928:3623878655] auto[0] 160 1 T18 2 T237 2 T68 2
auto[3489660928:3623878655] auto[1] 70 1 T117 2 T48 2 T51 2
auto[3623878656:3758096383] auto[0] 150 1 T19 4 T50 2 T48 6
auto[3623878656:3758096383] auto[1] 70 1 T55 2 T236 2 T229 2
auto[3758096384:3892314111] auto[0] 134 1 T18 4 T79 2 T55 2
auto[3758096384:3892314111] auto[1] 68 1 T227 2 T203 2 T5 2
auto[3892314112:4026531839] auto[0] 150 1 T17 2 T18 4 T36 2
auto[3892314112:4026531839] auto[1] 64 1 T78 2 T48 2 T51 2
auto[4026531840:4160749567] auto[0] 104 1 T18 2 T78 2 T191 2
auto[4026531840:4160749567] auto[1] 68 1 T194 2 T6 2 T66 2
auto[4160749568:4294967295] auto[0] 140 1 T18 2 T97 2 T5 2
auto[4160749568:4294967295] auto[1] 78 1 T18 2 T8 2 T56 2

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