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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4546 1 T3 6 T13 6 T15 6
auto[1] 2226 1 T2 4 T3 2 T13 4



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 172 1 T29 6 T210 2 T56 2
auto[134217728:268435455] 216 1 T17 2 T29 2 T210 2
auto[268435456:402653183] 206 1 T13 2 T17 2 T40 2
auto[402653184:536870911] 210 1 T2 2 T13 2 T17 2
auto[536870912:671088639] 204 1 T13 2 T203 2 T51 2
auto[671088640:805306367] 182 1 T85 2 T203 2 T5 2
auto[805306368:939524095] 200 1 T3 2 T29 8 T203 2
auto[939524096:1073741823] 224 1 T55 4 T56 2 T114 2
auto[1073741824:1207959551] 204 1 T29 4 T4 2 T114 2
auto[1207959552:1342177279] 230 1 T17 2 T85 2 T111 2
auto[1342177280:1476395007] 252 1 T15 2 T29 4 T51 2
auto[1476395008:1610612735] 210 1 T85 2 T40 2 T4 2
auto[1610612736:1744830463] 198 1 T15 2 T29 4 T203 2
auto[1744830464:1879048191] 212 1 T2 2 T15 2 T28 2
auto[1879048192:2013265919] 206 1 T14 2 T29 2 T203 4
auto[2013265920:2147483647] 232 1 T17 4 T40 2 T29 6
auto[2147483648:2281701375] 220 1 T19 2 T51 4 T111 4
auto[2281701376:2415919103] 194 1 T54 2 T56 2 T197 4
auto[2415919104:2550136831] 190 1 T13 2 T29 2 T54 2
auto[2550136832:2684354559] 230 1 T18 2 T29 2 T203 2
auto[2684354560:2818572287] 252 1 T17 2 T18 2 T29 4
auto[2818572288:2952790015] 244 1 T17 2 T54 2 T111 2
auto[2952790016:3087007743] 210 1 T15 2 T17 2 T29 2
auto[3087007744:3221225471] 186 1 T29 2 T204 2 T59 2
auto[3221225472:3355443199] 228 1 T3 4 T15 2 T30 2
auto[3355443200:3489660927] 188 1 T40 2 T51 2 T208 2
auto[3489660928:3623878655] 196 1 T3 2 T19 2 T4 2
auto[3623878656:3758096383] 214 1 T29 4 T30 2 T139 2
auto[3758096384:3892314111] 232 1 T18 2 T40 2 T29 2
auto[3892314112:4026531839] 212 1 T13 2 T29 4 T204 2
auto[4026531840:4160749567] 226 1 T111 2 T93 2 T112 2
auto[4160749568:4294967295] 192 1 T29 2 T210 2 T204 2



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 116 1 T29 4 T56 2 T114 2
auto[0:134217727] auto[1] 56 1 T29 2 T210 2 T220 2
auto[134217728:268435455] auto[0] 146 1 T17 2 T29 2 T210 2
auto[134217728:268435455] auto[1] 70 1 T114 2 T101 2 T214 2
auto[268435456:402653183] auto[0] 150 1 T13 2 T17 2 T40 2
auto[268435456:402653183] auto[1] 56 1 T111 2 T112 2 T49 4
auto[402653184:536870911] auto[0] 148 1 T13 2 T17 2 T19 4
auto[402653184:536870911] auto[1] 62 1 T2 2 T207 4 T152 2
auto[536870912:671088639] auto[0] 148 1 T13 2 T51 2 T139 2
auto[536870912:671088639] auto[1] 56 1 T203 2 T113 2 T68 2
auto[671088640:805306367] auto[0] 110 1 T203 2 T57 2 T49 2
auto[671088640:805306367] auto[1] 72 1 T85 2 T5 2 T90 2
auto[805306368:939524095] auto[0] 128 1 T29 8 T203 2 T30 2
auto[805306368:939524095] auto[1] 72 1 T3 2 T152 2 T209 4
auto[939524096:1073741823] auto[0] 158 1 T55 4 T56 2 T112 2
auto[939524096:1073741823] auto[1] 66 1 T114 2 T101 2 T153 2
auto[1073741824:1207959551] auto[0] 142 1 T29 2 T4 2 T57 2
auto[1073741824:1207959551] auto[1] 62 1 T29 2 T114 2 T153 2
auto[1207959552:1342177279] auto[0] 156 1 T17 2 T85 2 T71 2
auto[1207959552:1342177279] auto[1] 74 1 T111 2 T152 2 T279 2
auto[1342177280:1476395007] auto[0] 178 1 T29 4 T51 2 T4 2
auto[1342177280:1476395007] auto[1] 74 1 T15 2 T64 2 T195 4
auto[1476395008:1610612735] auto[0] 132 1 T85 2 T40 2 T4 2
auto[1476395008:1610612735] auto[1] 78 1 T113 2 T49 4 T279 2
auto[1610612736:1744830463] auto[0] 130 1 T15 2 T29 2 T203 2
auto[1610612736:1744830463] auto[1] 68 1 T29 2 T49 2 T220 2
auto[1744830464:1879048191] auto[0] 134 1 T15 2 T29 2 T204 2
auto[1744830464:1879048191] auto[1] 78 1 T2 2 T28 2 T114 2
auto[1879048192:2013265919] auto[0] 126 1 T203 2 T30 2 T4 4
auto[1879048192:2013265919] auto[1] 80 1 T14 2 T29 2 T203 2
auto[2013265920:2147483647] auto[0] 144 1 T17 4 T40 2 T29 6
auto[2013265920:2147483647] auto[1] 88 1 T93 2 T338 2 T209 2
auto[2147483648:2281701375] auto[0] 158 1 T19 2 T51 4 T111 4
auto[2147483648:2281701375] auto[1] 62 1 T152 2 T220 2 T205 2
auto[2281701376:2415919103] auto[0] 126 1 T54 2 T56 2 T197 4
auto[2281701376:2415919103] auto[1] 68 1 T209 2 T76 2 T141 4
auto[2415919104:2550136831] auto[0] 128 1 T54 2 T56 2 T112 2
auto[2415919104:2550136831] auto[1] 62 1 T13 2 T29 2 T111 2
auto[2550136832:2684354559] auto[0] 150 1 T18 2 T29 2 T55 2
auto[2550136832:2684354559] auto[1] 80 1 T203 2 T208 2 T101 2
auto[2684354560:2818572287] auto[0] 166 1 T17 2 T18 2 T29 4
auto[2684354560:2818572287] auto[1] 86 1 T48 2 T112 4 T209 2
auto[2818572288:2952790015] auto[0] 164 1 T17 2 T54 2 T49 4
auto[2818572288:2952790015] auto[1] 80 1 T111 2 T114 2 T113 2
auto[2952790016:3087007743] auto[0] 138 1 T15 2 T29 2 T112 2
auto[2952790016:3087007743] auto[1] 72 1 T17 2 T48 2 T140 2
auto[3087007744:3221225471] auto[0] 124 1 T29 2 T204 2 T59 2
auto[3087007744:3221225471] auto[1] 62 1 T112 2 T279 2 T68 2
auto[3221225472:3355443199] auto[0] 172 1 T3 4 T30 2 T4 2
auto[3221225472:3355443199] auto[1] 56 1 T15 2 T119 2 T112 2
auto[3355443200:3489660927] auto[0] 120 1 T40 2 T51 2 T208 2
auto[3355443200:3489660927] auto[1] 68 1 T114 2 T6 2 T87 2
auto[3489660928:3623878655] auto[0] 130 1 T3 2 T19 2 T4 2
auto[3489660928:3623878655] auto[1] 66 1 T207 2 T56 2 T112 2
auto[3623878656:3758096383] auto[0] 132 1 T29 2 T30 2 T204 2
auto[3623878656:3758096383] auto[1] 82 1 T29 2 T139 2 T49 4
auto[3758096384:3892314111] auto[0] 152 1 T18 2 T40 2 T29 2
auto[3758096384:3892314111] auto[1] 80 1 T30 2 T55 2 T111 2
auto[3892314112:4026531839] auto[0] 136 1 T29 2 T204 2 T112 2
auto[3892314112:4026531839] auto[1] 76 1 T13 2 T29 2 T205 2
auto[4026531840:4160749567] auto[0] 164 1 T111 2 T112 2 T252 2
auto[4026531840:4160749567] auto[1] 62 1 T93 2 T250 2 T57 2
auto[4160749568:4294967295] auto[0] 140 1 T210 2 T204 2 T112 2
auto[4160749568:4294967295] auto[1] 52 1 T29 2 T251 2 T209 2

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