Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4598

1

T2

2

T3

6

T13

8

auto[1]

2174

1

T2

2

T3

2

T13

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	168	1			T17	2		T29	2		T139	2
auto[134217728:268435455]	204	1			T51	2		T56	2		T112	2
auto[268435456:402653183]	170	1			T28	2		T29	2		T30	2
auto[402653184:536870911]	206	1			T3	2		T40	4		T29	4
auto[536870912:671088639]	188	1			T139	2		T56	2		T338	2
auto[671088640:805306367]	198	1			T203	2		T4	2		T114	2
auto[805306368:939524095]	230	1			T17	2		T29	4		T32	2
auto[939524096:1073741823]	226	1			T15	2		T40	2		T29	2
auto[1073741824:1207959551]	238	1			T17	2		T19	2		T51	2
auto[1207959552:1342177279]	210	1			T15	2		T203	2		T30	4
auto[1342177280:1476395007]	222	1			T29	2		T119	2		T197	2
auto[1476395008:1610612735]	226	1			T17	2		T29	2		T139	2
auto[1610612736:1744830463]	214	1			T40	2		T139	2		T111	2
auto[1744830464:1879048191]	200	1			T2	2		T85	2		T29	4
auto[1879048192:2013265919]	222	1			T29	2		T54	2		T55	2
auto[2013265920:2147483647]	218	1			T29	2		T51	2		T54	2
auto[2147483648:2281701375]	214	1			T17	2		T18	4		T29	2
auto[2281701376:2415919103]	228	1			T13	2		T29	4		T203	2
auto[2415919104:2550136831]	226	1			T203	4		T5	4		T113	2
auto[2550136832:2684354559]	194	1			T13	2		T17	2		T207	2
auto[2684354560:2818572287]	230	1			T13	4		T85	2		T29	8
auto[2818572288:2952790015]	200	1			T15	2		T17	2		T29	2
auto[2952790016:3087007743]	228	1			T3	2		T19	2		T29	2
auto[3087007744:3221225471]	194	1			T2	2		T204	2		T55	2
auto[3221225472:3355443199]	180	1			T29	4		T48	2		T56	2
auto[3355443200:3489660927]	234	1			T3	2		T13	2		T17	2
auto[3489660928:3623878655]	220	1			T29	2		T4	2		T56	2
auto[3623878656:3758096383]	210	1			T15	2		T17	2		T18	2
auto[3758096384:3892314111]	254	1			T15	2		T19	4		T85	2
auto[3892314112:4026531839]	212	1			T111	2		T197	2		T64	2
auto[4026531840:4160749567]	180	1			T14	2		T29	4		T30	2
auto[4160749568:4294967295]	228	1			T3	2		T29	8		T30	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	110	1			T17	2		T204	2		T55	2
auto[0:134217727]	auto[1]	58	1			T29	2		T139	2		T220	2
auto[134217728:268435455]	auto[0]	142	1			T51	2		T56	2		T91	2
auto[134217728:268435455]	auto[1]	62	1			T112	2		T255	2		T50	4
auto[268435456:402653183]	auto[0]	96	1			T29	2		T30	2		T210	2
auto[268435456:402653183]	auto[1]	74	1			T28	2		T140	2		T76	2
auto[402653184:536870911]	auto[0]	156	1			T40	2		T29	2		T48	2
auto[402653184:536870911]	auto[1]	50	1			T3	2		T40	2		T29	2
auto[536870912:671088639]	auto[0]	118	1			T56	2		T338	2		T90	2
auto[536870912:671088639]	auto[1]	70	1			T139	2		T49	2		T50	6
auto[671088640:805306367]	auto[0]	148	1			T203	2		T4	2		T114	2
auto[671088640:805306367]	auto[1]	50	1			T112	2		T57	2		T252	2
auto[805306368:939524095]	auto[0]	148	1			T17	2		T29	2		T32	2
auto[805306368:939524095]	auto[1]	82	1			T29	2		T111	2		T209	2
auto[939524096:1073741823]	auto[0]	156	1			T15	2		T40	2		T29	2
auto[939524096:1073741823]	auto[1]	70	1			T101	2		T112	4		T6	2
auto[1073741824:1207959551]	auto[0]	166	1			T17	2		T19	2		T51	2
auto[1073741824:1207959551]	auto[1]	72	1			T210	2		T252	2		T49	2
auto[1207959552:1342177279]	auto[0]	136	1			T15	2		T203	2		T30	4
auto[1207959552:1342177279]	auto[1]	74	1			T4	2		T208	2		T113	2
auto[1342177280:1476395007]	auto[0]	144	1			T29	2		T119	2		T197	2
auto[1342177280:1476395007]	auto[1]	78	1			T256	2		T6	2		T50	2
auto[1476395008:1610612735]	auto[0]	146	1			T17	2		T29	2		T114	2
auto[1476395008:1610612735]	auto[1]	80	1			T139	2		T93	2		T112	2
auto[1610612736:1744830463]	auto[0]	130	1			T40	2		T57	2		T220	2
auto[1610612736:1744830463]	auto[1]	84	1			T139	2		T111	2		T112	2
auto[1744830464:1879048191]	auto[0]	136	1			T2	2		T29	2		T112	4
auto[1744830464:1879048191]	auto[1]	64	1			T85	2		T29	2		T112	2
auto[1879048192:2013265919]	auto[0]	166	1			T54	2		T55	2		T112	4
auto[1879048192:2013265919]	auto[1]	56	1			T29	2		T59	2		T209	2
auto[2013265920:2147483647]	auto[0]	158	1			T51	2		T54	2		T114	2
auto[2013265920:2147483647]	auto[1]	60	1			T29	2		T338	2		T255	2
auto[2147483648:2281701375]	auto[0]	134	1			T17	2		T18	4		T29	2
auto[2147483648:2281701375]	auto[1]	80	1			T203	2		T51	2		T112	2
auto[2281701376:2415919103]	auto[0]	162	1			T13	2		T29	2		T4	2
auto[2281701376:2415919103]	auto[1]	66	1			T29	2		T203	2		T49	4
auto[2415919104:2550136831]	auto[0]	158	1			T5	2		T205	4		T6	4
auto[2415919104:2550136831]	auto[1]	68	1			T203	4		T5	2		T113	2
auto[2550136832:2684354559]	auto[0]	132	1			T13	2		T17	2		T251	2
auto[2550136832:2684354559]	auto[1]	62	1			T207	2		T255	2		T50	2
auto[2684354560:2818572287]	auto[0]	172	1			T13	4		T85	2		T29	4
auto[2684354560:2818572287]	auto[1]	58	1			T29	4		T54	2		T205	2
auto[2818572288:2952790015]	auto[0]	138	1			T15	2		T17	2		T29	2
auto[2818572288:2952790015]	auto[1]	62	1			T209	2		T49	2		T220	2
auto[2952790016:3087007743]	auto[0]	154	1			T3	2		T19	2		T29	2
auto[2952790016:3087007743]	auto[1]	74	1			T208	2		T207	2		T152	2
auto[3087007744:3221225471]	auto[0]	136	1			T204	2		T55	2		T114	2
auto[3087007744:3221225471]	auto[1]	58	1			T2	2		T140	2		T50	2
auto[3221225472:3355443199]	auto[0]	136	1			T29	4		T48	2		T56	2
auto[3221225472:3355443199]	auto[1]	44	1			T111	2		T209	2		T121	2
auto[3355443200:3489660927]	auto[0]	158	1			T3	2		T17	2		T40	2
auto[3355443200:3489660927]	auto[1]	76	1			T13	2		T29	4		T209	2
auto[3489660928:3623878655]	auto[0]	154	1			T29	2		T4	2		T111	2
auto[3489660928:3623878655]	auto[1]	66	1			T56	2		T59	2		T112	2
auto[3623878656:3758096383]	auto[0]	150	1			T15	2		T17	2		T18	2
auto[3623878656:3758096383]	auto[1]	60	1			T110	2		T49	2		T278	2
auto[3758096384:3892314111]	auto[0]	188	1			T15	2		T19	4		T30	2
auto[3758096384:3892314111]	auto[1]	66	1			T85	2		T203	2		T207	2
auto[3892314112:4026531839]	auto[0]	118	1			T64	2		T49	4		T220	2
auto[3892314112:4026531839]	auto[1]	94	1			T111	2		T197	2		T49	2
auto[4026531840:4160749567]	auto[0]	110	1			T29	4		T111	2		T93	2
auto[4026531840:4160749567]	auto[1]	70	1			T14	2		T30	2		T112	2
auto[4160749568:4294967295]	auto[0]	142	1			T3	2		T29	6		T30	2
auto[4160749568:4294967295]	auto[1]	86	1			T29	2		T56	2		T111	2