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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4610 1 T1 10 T2 6 T3 6
auto[1] 2092 1 T1 2 T2 4 T3 2



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 202 1 T26 2 T27 2 T4 4
auto[134217728:268435455] 200 1 T15 2 T25 6 T6 2
auto[268435456:402653183] 200 1 T2 2 T25 2 T26 2
auto[402653184:536870911] 238 1 T27 2 T4 6 T54 2
auto[536870912:671088639] 222 1 T3 2 T15 2 T4 2
auto[671088640:805306367] 202 1 T3 2 T13 2 T16 2
auto[805306368:939524095] 204 1 T1 2 T15 2 T44 2
auto[939524096:1073741823] 246 1 T64 2 T67 2 T88 2
auto[1073741824:1207959551] 186 1 T11 2 T44 2 T26 2
auto[1207959552:1342177279] 204 1 T25 2 T5 2 T47 2
auto[1342177280:1476395007] 244 1 T2 4 T3 2 T10 2
auto[1476395008:1610612735] 204 1 T15 2 T4 6 T54 2
auto[1610612736:1744830463] 166 1 T44 2 T25 2 T77 2
auto[1744830464:1879048191] 206 1 T44 4 T25 2 T52 2
auto[1879048192:2013265919] 204 1 T13 2 T15 2 T25 2
auto[2013265920:2147483647] 192 1 T44 2 T67 2 T4 2
auto[2147483648:2281701375] 214 1 T2 4 T25 2 T77 2
auto[2281701376:2415919103] 198 1 T3 2 T16 2 T64 2
auto[2415919104:2550136831] 238 1 T25 2 T28 2 T30 2
auto[2550136832:2684354559] 224 1 T16 2 T25 2 T26 2
auto[2684354560:2818572287] 168 1 T10 2 T4 4 T121 2
auto[2818572288:2952790015] 296 1 T10 2 T13 2 T34 2
auto[2952790016:3087007743] 190 1 T1 4 T13 2 T25 4
auto[3087007744:3221225471] 188 1 T34 2 T93 2 T54 2
auto[3221225472:3355443199] 218 1 T15 2 T27 2 T67 2
auto[3355443200:3489660927] 214 1 T1 2 T25 8 T77 2
auto[3489660928:3623878655] 220 1 T1 2 T16 2 T25 6
auto[3623878656:3758096383] 206 1 T44 2 T77 2 T4 2
auto[3758096384:3892314111] 216 1 T1 2 T16 2 T26 2
auto[3892314112:4026531839] 170 1 T44 2 T25 2 T4 2
auto[4026531840:4160749567] 206 1 T13 2 T54 4 T5 2
auto[4160749568:4294967295] 216 1 T34 2 T25 2 T4 2



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 132 1 T26 2 T27 2 T4 2
auto[0:134217727] auto[1] 70 1 T4 2 T54 2 T46 4
auto[134217728:268435455] auto[0] 134 1 T15 2 T25 4 T46 6
auto[134217728:268435455] auto[1] 66 1 T25 2 T6 2 T316 2
auto[268435456:402653183] auto[0] 134 1 T25 2 T81 2 T45 4
auto[268435456:402653183] auto[1] 66 1 T2 2 T26 2 T6 2
auto[402653184:536870911] auto[0] 164 1 T27 2 T4 4 T54 2
auto[402653184:536870911] auto[1] 74 1 T4 2 T45 2 T297 2
auto[536870912:671088639] auto[0] 144 1 T4 2 T37 2 T5 2
auto[536870912:671088639] auto[1] 78 1 T3 2 T15 2 T55 2
auto[671088640:805306367] auto[0] 136 1 T3 2 T13 2 T17 2
auto[671088640:805306367] auto[1] 66 1 T16 2 T64 2 T45 2
auto[805306368:939524095] auto[0] 132 1 T1 2 T15 2 T25 4
auto[805306368:939524095] auto[1] 72 1 T44 2 T25 2 T28 2
auto[939524096:1073741823] auto[0] 164 1 T67 2 T88 2 T37 2
auto[939524096:1073741823] auto[1] 82 1 T64 2 T4 2 T45 2
auto[1073741824:1207959551] auto[0] 126 1 T44 2 T26 2 T54 4
auto[1073741824:1207959551] auto[1] 60 1 T11 2 T67 2 T4 2
auto[1207959552:1342177279] auto[0] 138 1 T25 2 T5 2 T47 2
auto[1207959552:1342177279] auto[1] 66 1 T244 2 T421 2 T46 2
auto[1342177280:1476395007] auto[0] 172 1 T2 2 T3 2 T37 2
auto[1342177280:1476395007] auto[1] 72 1 T2 2 T10 2 T48 2
auto[1476395008:1610612735] auto[0] 130 1 T15 2 T4 4 T54 2
auto[1476395008:1610612735] auto[1] 74 1 T4 2 T197 2 T236 2
auto[1610612736:1744830463] auto[0] 118 1 T44 2 T77 2 T67 2
auto[1610612736:1744830463] auto[1] 48 1 T25 2 T55 2 T45 2
auto[1744830464:1879048191] auto[0] 144 1 T44 4 T25 2 T52 2
auto[1744830464:1879048191] auto[1] 62 1 T46 4 T197 2 T60 2
auto[1879048192:2013265919] auto[0] 130 1 T13 2 T25 2 T88 2
auto[1879048192:2013265919] auto[1] 74 1 T15 2 T45 2 T31 2
auto[2013265920:2147483647] auto[0] 138 1 T44 2 T67 2 T4 2
auto[2013265920:2147483647] auto[1] 54 1 T5 2 T408 2 T253 2
auto[2147483648:2281701375] auto[0] 142 1 T2 4 T77 2 T4 2
auto[2147483648:2281701375] auto[1] 72 1 T25 2 T4 4 T47 2
auto[2281701376:2415919103] auto[0] 138 1 T3 2 T27 2 T4 2
auto[2281701376:2415919103] auto[1] 60 1 T16 2 T64 2 T5 2
auto[2415919104:2550136831] auto[0] 162 1 T28 2 T45 2 T56 2
auto[2415919104:2550136831] auto[1] 76 1 T25 2 T30 2 T18 2
auto[2550136832:2684354559] auto[0] 168 1 T26 2 T4 4 T119 2
auto[2550136832:2684354559] auto[1] 56 1 T16 2 T25 2 T408 2
auto[2684354560:2818572287] auto[0] 114 1 T4 4 T52 2 T47 2
auto[2684354560:2818572287] auto[1] 54 1 T10 2 T121 2 T5 4
auto[2818572288:2952790015] auto[0] 208 1 T13 2 T34 2 T25 2
auto[2818572288:2952790015] auto[1] 88 1 T10 2 T93 2 T54 2
auto[2952790016:3087007743] auto[0] 132 1 T1 4 T13 2 T88 2
auto[2952790016:3087007743] auto[1] 58 1 T25 4 T4 2 T119 2
auto[3087007744:3221225471] auto[0] 134 1 T34 2 T93 2 T5 2
auto[3087007744:3221225471] auto[1] 54 1 T54 2 T55 2 T45 2
auto[3221225472:3355443199] auto[0] 148 1 T15 2 T27 2 T30 2
auto[3221225472:3355443199] auto[1] 70 1 T67 2 T4 2 T5 2
auto[3355443200:3489660927] auto[0] 140 1 T1 2 T77 2 T4 2
auto[3355443200:3489660927] auto[1] 74 1 T25 8 T45 4 T237 2
auto[3489660928:3623878655] auto[0] 154 1 T1 2 T25 2 T5 2
auto[3489660928:3623878655] auto[1] 66 1 T16 2 T25 4 T64 2
auto[3623878656:3758096383] auto[0] 132 1 T77 2 T4 2 T37 4
auto[3623878656:3758096383] auto[1] 74 1 T44 2 T37 4 T235 2
auto[3758096384:3892314111] auto[0] 160 1 T64 2 T93 2 T54 4
auto[3758096384:3892314111] auto[1] 56 1 T1 2 T16 2 T26 2
auto[3892314112:4026531839] auto[0] 130 1 T25 2 T5 2 T235 2
auto[3892314112:4026531839] auto[1] 40 1 T44 2 T4 2 T54 2
auto[4026531840:4160749567] auto[0] 148 1 T13 2 T54 2 T5 2
auto[4026531840:4160749567] auto[1] 58 1 T54 2 T46 2 T49 4
auto[4160749568:4294967295] auto[0] 164 1 T34 2 T25 2 T37 2
auto[4160749568:4294967295] auto[1] 52 1 T4 2 T46 4 T39 2

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