Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4580

1

T1

10

T2

10

T3

6

auto[1]

2122

1

T1

2

T3

2

T11

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	166	1			T25	2		T67	2		T54	2
auto[134217728:268435455]	230	1			T1	2		T67	2		T4	4
auto[268435456:402653183]	198	1			T15	2		T34	2		T44	2
auto[402653184:536870911]	218	1			T2	2		T3	2		T16	2
auto[536870912:671088639]	192	1			T10	2		T119	2		T54	2
auto[671088640:805306367]	202	1			T25	2		T88	2		T4	4
auto[805306368:939524095]	192	1			T2	2		T25	4		T5	2
auto[939524096:1073741823]	202	1			T1	2		T25	4		T4	2
auto[1073741824:1207959551]	216	1			T16	2		T44	4		T25	2
auto[1207959552:1342177279]	190	1			T2	2		T3	2		T25	2
auto[1342177280:1476395007]	210	1			T13	2		T64	2		T67	2
auto[1476395008:1610612735]	232	1			T10	2		T25	2		T64	2
auto[1610612736:1744830463]	228	1			T10	2		T16	2		T26	4
auto[1744830464:1879048191]	228	1			T44	2		T26	2		T4	2
auto[1879048192:2013265919]	168	1			T25	2		T67	2		T4	4
auto[2013265920:2147483647]	204	1			T16	2		T27	2		T37	2
auto[2147483648:2281701375]	232	1			T1	4		T15	2		T25	6
auto[2281701376:2415919103]	208	1			T13	2		T4	2		T37	2
auto[2415919104:2550136831]	214	1			T1	2		T13	4		T25	2
auto[2550136832:2684354559]	204	1			T34	4		T93	2		T4	4
auto[2684354560:2818572287]	218	1			T15	2		T25	2		T77	2
auto[2818572288:2952790015]	222	1			T3	2		T25	2		T88	2
auto[2952790016:3087007743]	186	1			T13	2		T16	2		T25	2
auto[3087007744:3221225471]	216	1			T15	4		T44	2		T25	2
auto[3221225472:3355443199]	216	1			T15	2		T25	2		T4	2
auto[3355443200:3489660927]	202	1			T2	4		T44	4		T27	2
auto[3489660928:3623878655]	228	1			T25	4		T67	2		T4	4
auto[3623878656:3758096383]	196	1			T25	2		T17	2		T52	2
auto[3758096384:3892314111]	212	1			T77	4		T26	4		T64	2
auto[3892314112:4026531839]	256	1			T3	2		T44	2		T25	4
auto[4026531840:4160749567]	198	1			T11	2		T67	2		T88	2
auto[4160749568:4294967295]	218	1			T1	2		T4	2		T37	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	106	1			T67	2		T54	2		T5	2
auto[0:134217727]	auto[1]	60	1			T25	2		T81	2		T287	2
auto[134217728:268435455]	auto[0]	160	1			T1	2		T67	2		T4	4
auto[134217728:268435455]	auto[1]	70	1			T45	2		T237	2		T269	2
auto[268435456:402653183]	auto[0]	140	1			T15	2		T34	2		T44	2
auto[268435456:402653183]	auto[1]	58	1			T25	2		T4	4		T52	2
auto[402653184:536870911]	auto[0]	138	1			T2	2		T3	2		T16	2
auto[402653184:536870911]	auto[1]	80	1			T77	2		T5	2		T297	2
auto[536870912:671088639]	auto[0]	132	1			T10	2		T55	2		T235	2
auto[536870912:671088639]	auto[1]	60	1			T119	2		T54	2		T230	2
auto[671088640:805306367]	auto[0]	130	1			T25	2		T88	2		T37	2
auto[671088640:805306367]	auto[1]	72	1			T4	4		T53	2		T243	2
auto[805306368:939524095]	auto[0]	146	1			T2	2		T25	4		T5	2
auto[805306368:939524095]	auto[1]	46	1			T237	2		T197	2		T225	2
auto[939524096:1073741823]	auto[0]	146	1			T1	2		T25	4		T4	2
auto[939524096:1073741823]	auto[1]	56	1			T54	4		T373	2		T49	2
auto[1073741824:1207959551]	auto[0]	146	1			T16	2		T44	4		T64	2
auto[1073741824:1207959551]	auto[1]	70	1			T25	2		T4	2		T37	2
auto[1207959552:1342177279]	auto[0]	128	1			T2	2		T25	2		T45	2
auto[1207959552:1342177279]	auto[1]	62	1			T3	2		T241	2		T80	2
auto[1342177280:1476395007]	auto[0]	154	1			T64	2		T67	2		T238	2
auto[1342177280:1476395007]	auto[1]	56	1			T13	2		T296	2		T85	2
auto[1476395008:1610612735]	auto[0]	148	1			T10	2		T64	2		T88	2
auto[1476395008:1610612735]	auto[1]	84	1			T25	2		T4	4		T5	2
auto[1610612736:1744830463]	auto[0]	148	1			T10	2		T16	2		T26	4
auto[1610612736:1744830463]	auto[1]	80	1			T5	4		T238	2		T194	2
auto[1744830464:1879048191]	auto[0]	156	1			T44	2		T26	2		T5	2
auto[1744830464:1879048191]	auto[1]	72	1			T4	2		T45	2		T269	2
auto[1879048192:2013265919]	auto[0]	110	1			T25	2		T67	2		T4	4
auto[1879048192:2013265919]	auto[1]	58	1			T55	2		T19	2		T342	2
auto[2013265920:2147483647]	auto[0]	150	1			T16	2		T27	2		T37	2
auto[2013265920:2147483647]	auto[1]	54	1			T47	2		T78	2		T316	2
auto[2147483648:2281701375]	auto[0]	146	1			T1	2		T25	2		T93	2
auto[2147483648:2281701375]	auto[1]	86	1			T1	2		T15	2		T25	4
auto[2281701376:2415919103]	auto[0]	148	1			T13	2		T37	2		T269	2
auto[2281701376:2415919103]	auto[1]	60	1			T4	2		T192	2		T322	2
auto[2415919104:2550136831]	auto[0]	160	1			T1	2		T13	2		T25	2
auto[2415919104:2550136831]	auto[1]	54	1			T13	2		T45	2		T411	2
auto[2550136832:2684354559]	auto[0]	134	1			T34	2		T4	4		T37	2
auto[2550136832:2684354559]	auto[1]	70	1			T34	2		T93	2		T48	2
auto[2684354560:2818572287]	auto[0]	130	1			T15	2		T4	2		T45	2
auto[2684354560:2818572287]	auto[1]	88	1			T25	2		T77	2		T93	2
auto[2818572288:2952790015]	auto[0]	154	1			T3	2		T25	2		T88	2
auto[2818572288:2952790015]	auto[1]	68	1			T28	2		T5	4		T230	2
auto[2952790016:3087007743]	auto[0]	116	1			T13	2		T16	2		T5	2
auto[2952790016:3087007743]	auto[1]	70	1			T25	2		T48	2		T235	2
auto[3087007744:3221225471]	auto[0]	168	1			T15	2		T44	2		T4	2
auto[3087007744:3221225471]	auto[1]	48	1			T15	2		T25	2		T5	4
auto[3221225472:3355443199]	auto[0]	148	1			T15	2		T4	2		T54	2
auto[3221225472:3355443199]	auto[1]	68	1			T25	2		T28	2		T5	4
auto[3355443200:3489660927]	auto[0]	138	1			T2	4		T44	2		T27	2
auto[3355443200:3489660927]	auto[1]	64	1			T44	2		T45	2		T60	2
auto[3489660928:3623878655]	auto[0]	172	1			T25	4		T67	2		T4	2
auto[3489660928:3623878655]	auto[1]	56	1			T4	2		T5	2		T48	2
auto[3623878656:3758096383]	auto[0]	132	1			T25	2		T54	4		T5	2
auto[3623878656:3758096383]	auto[1]	64	1			T17	2		T52	2		T18	2
auto[3758096384:3892314111]	auto[0]	158	1			T26	2		T64	2		T27	2
auto[3758096384:3892314111]	auto[1]	54	1			T77	4		T26	2		T4	2
auto[3892314112:4026531839]	auto[0]	174	1			T3	2		T44	2		T37	2
auto[3892314112:4026531839]	auto[1]	82	1			T25	4		T54	2		T45	2
auto[4026531840:4160749567]	auto[0]	126	1			T88	2		T37	2		T5	2
auto[4026531840:4160749567]	auto[1]	72	1			T11	2		T67	2		T81	2
auto[4160749568:4294967295]	auto[0]	138	1			T1	2		T37	2		T52	2
auto[4160749568:4294967295]	auto[1]	80	1			T4	2		T5	2		T68	2