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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4522 1 T2 6 T3 6 T4 8
auto[1] 2204 1 T2 2 T4 2 T14 6



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 202 1 T5 8 T78 2 T20 2
auto[134217728:268435455] 234 1 T14 2 T82 2 T44 2
auto[268435456:402653183] 210 1 T2 2 T3 4 T13 2
auto[402653184:536870911] 202 1 T15 2 T20 2 T130 2
auto[536870912:671088639] 170 1 T4 2 T199 2 T214 2
auto[671088640:805306367] 212 1 T2 2 T49 2 T129 2
auto[805306368:939524095] 214 1 T15 2 T32 2 T78 2
auto[939524096:1073741823] 206 1 T2 2 T14 2 T5 2
auto[1073741824:1207959551] 210 1 T34 2 T5 2 T238 2
auto[1207959552:1342177279] 186 1 T34 2 T44 2 T51 2
auto[1342177280:1476395007] 226 1 T27 2 T5 6 T129 4
auto[1476395008:1610612735] 212 1 T5 2 T42 2 T212 2
auto[1610612736:1744830463] 178 1 T26 2 T187 2 T129 2
auto[1744830464:1879048191] 228 1 T5 2 T42 2 T248 2
auto[1879048192:2013265919] 208 1 T27 2 T5 4 T18 2
auto[2013265920:2147483647] 224 1 T4 4 T21 2 T144 2
auto[2147483648:2281701375] 238 1 T26 2 T5 4 T42 2
auto[2281701376:2415919103] 184 1 T15 2 T5 8 T42 2
auto[2415919104:2550136831] 194 1 T49 2 T82 2 T20 2
auto[2550136832:2684354559] 226 1 T4 2 T14 2 T5 4
auto[2684354560:2818572287] 210 1 T34 2 T49 2 T205 2
auto[2818572288:2952790015] 200 1 T4 2 T13 2 T44 4
auto[2952790016:3087007743] 244 1 T14 2 T26 2 T18 2
auto[3087007744:3221225471] 220 1 T26 2 T5 4 T237 2
auto[3221225472:3355443199] 242 1 T14 2 T26 2 T82 2
auto[3355443200:3489660927] 226 1 T3 2 T13 2 T26 2
auto[3489660928:3623878655] 198 1 T15 2 T187 2 T129 2
auto[3623878656:3758096383] 198 1 T13 2 T26 2 T44 6
auto[3758096384:3892314111] 176 1 T5 2 T19 2 T54 2
auto[3892314112:4026531839] 192 1 T2 2 T78 2 T44 2
auto[4026531840:4160749567] 206 1 T27 2 T5 2 T78 2
auto[4160749568:4294967295] 250 1 T13 2 T26 2 T5 2



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 150 1 T5 8 T78 2 T20 2
auto[0:134217727] auto[1] 52 1 T48 2 T288 2 T123 2
auto[134217728:268435455] auto[0] 164 1 T14 2 T44 2 T199 2
auto[134217728:268435455] auto[1] 70 1 T82 2 T22 2 T54 2
auto[268435456:402653183] auto[0] 152 1 T2 2 T3 4 T13 2
auto[268435456:402653183] auto[1] 58 1 T243 2 T54 4 T299 2
auto[402653184:536870911] auto[0] 124 1 T20 2 T130 2 T242 2
auto[402653184:536870911] auto[1] 78 1 T15 2 T242 2 T212 2
auto[536870912:671088639] auto[0] 96 1 T4 2 T199 2 T214 2
auto[536870912:671088639] auto[1] 74 1 T243 2 T89 2 T343 2
auto[671088640:805306367] auto[0] 138 1 T2 2 T49 2 T129 2
auto[671088640:805306367] auto[1] 74 1 T48 2 T397 2 T263 2
auto[805306368:939524095] auto[0] 142 1 T15 2 T78 2 T82 2
auto[805306368:939524095] auto[1] 72 1 T32 2 T43 2 T66 2
auto[939524096:1073741823] auto[0] 132 1 T2 2 T14 2 T5 2
auto[939524096:1073741823] auto[1] 74 1 T187 2 T51 2 T24 2
auto[1073741824:1207959551] auto[0] 156 1 T34 2 T5 2 T238 2
auto[1073741824:1207959551] auto[1] 54 1 T217 2 T123 4 T53 2
auto[1207959552:1342177279] auto[0] 132 1 T44 2 T51 2 T131 4
auto[1207959552:1342177279] auto[1] 54 1 T34 2 T123 2 T236 2
auto[1342177280:1476395007] auto[0] 130 1 T5 6 T129 2 T23 2
auto[1342177280:1476395007] auto[1] 96 1 T27 2 T129 2 T212 2
auto[1476395008:1610612735] auto[0] 128 1 T5 2 T42 2 T24 2
auto[1476395008:1610612735] auto[1] 84 1 T212 2 T23 2 T200 2
auto[1610612736:1744830463] auto[0] 114 1 T26 2 T129 2 T6 2
auto[1610612736:1744830463] auto[1] 64 1 T187 2 T29 2 T86 2
auto[1744830464:1879048191] auto[0] 140 1 T42 2 T248 2 T100 2
auto[1744830464:1879048191] auto[1] 88 1 T5 2 T86 2 T54 2
auto[1879048192:2013265919] auto[0] 114 1 T5 2 T18 2 T199 2
auto[1879048192:2013265919] auto[1] 94 1 T27 2 T5 2 T48 2
auto[2013265920:2147483647] auto[0] 156 1 T4 4 T21 2 T426 2
auto[2013265920:2147483647] auto[1] 68 1 T144 2 T63 2 T411 2
auto[2147483648:2281701375] auto[0] 146 1 T5 4 T42 2 T44 2
auto[2147483648:2281701375] auto[1] 92 1 T26 2 T212 2 T200 2
auto[2281701376:2415919103] auto[0] 124 1 T15 2 T5 8 T42 2
auto[2281701376:2415919103] auto[1] 60 1 T44 2 T54 2 T70 4
auto[2415919104:2550136831] auto[0] 124 1 T49 2 T82 2 T20 2
auto[2415919104:2550136831] auto[1] 70 1 T200 2 T205 2 T67 2
auto[2550136832:2684354559] auto[0] 176 1 T4 2 T5 2 T49 2
auto[2550136832:2684354559] auto[1] 50 1 T14 2 T5 2 T205 2
auto[2684354560:2818572287] auto[0] 152 1 T34 2 T49 2 T205 2
auto[2684354560:2818572287] auto[1] 58 1 T203 2 T67 2 T123 2
auto[2818572288:2952790015] auto[0] 152 1 T13 2 T44 4 T51 2
auto[2818572288:2952790015] auto[1] 48 1 T4 2 T200 2 T67 2
auto[2952790016:3087007743] auto[0] 174 1 T49 2 T82 4 T54 4
auto[2952790016:3087007743] auto[1] 70 1 T14 2 T26 2 T18 2
auto[3087007744:3221225471] auto[0] 146 1 T26 2 T5 4 T237 2
auto[3087007744:3221225471] auto[1] 74 1 T51 2 T200 2 T398 2
auto[3221225472:3355443199] auto[0] 166 1 T82 2 T205 2 T28 2
auto[3221225472:3355443199] auto[1] 76 1 T14 2 T26 2 T44 2
auto[3355443200:3489660927] auto[0] 146 1 T3 2 T13 2 T26 2
auto[3355443200:3489660927] auto[1] 80 1 T5 2 T49 2 T43 2
auto[3489660928:3623878655] auto[0] 140 1 T15 2 T129 2 T87 2
auto[3489660928:3623878655] auto[1] 58 1 T187 2 T144 2 T405 2
auto[3623878656:3758096383] auto[0] 142 1 T13 2 T44 4 T199 2
auto[3623878656:3758096383] auto[1] 56 1 T26 2 T44 2 T51 2
auto[3758096384:3892314111] auto[0] 128 1 T19 2 T54 2 T67 2
auto[3758096384:3892314111] auto[1] 48 1 T5 2 T67 2 T337 2
auto[3892314112:4026531839] auto[0] 116 1 T78 2 T130 4 T199 2
auto[3892314112:4026531839] auto[1] 76 1 T2 2 T44 2 T187 2
auto[4026531840:4160749567] auto[0] 134 1 T27 2 T5 2 T78 2
auto[4026531840:4160749567] auto[1] 72 1 T43 2 T123 2 T397 2
auto[4160749568:4294967295] auto[0] 188 1 T13 2 T42 2 T130 2
auto[4160749568:4294967295] auto[1] 62 1 T26 2 T5 2 T405 2

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