Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6715

1

T1

9

T4

31

T16

1

auto[1]

319

1

T1

11

T79

3

T144

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	2811	1			T1	5		T4	14		T18	6
auto[134217728:268435455]	166	1			T4	1		T44	1		T86	2
auto[268435456:402653183]	143	1			T4	1		T18	1		T44	1
auto[402653184:536870911]	157	1			T1	1		T26	1		T55	1
auto[536870912:671088639]	160	1			T35	1		T26	1		T197	1
auto[671088640:805306367]	126	1			T1	2		T44	1		T25	1
auto[805306368:939524095]	145	1			T44	2		T35	1		T26	1
auto[939524096:1073741823]	139	1			T1	1		T25	1		T35	1
auto[1073741824:1207959551]	130	1			T4	3		T44	1		T197	1
auto[1207959552:1342177279]	119	1			T4	1		T25	1		T35	2
auto[1342177280:1476395007]	137	1			T4	2		T18	1		T26	2
auto[1476395008:1610612735]	134	1			T1	1		T195	1		T189	2
auto[1610612736:1744830463]	119	1			T26	1		T195	1		T208	2
auto[1744830464:1879048191]	140	1			T1	1		T4	1		T18	1
auto[1879048192:2013265919]	105	1			T1	1		T4	2		T18	1
auto[2013265920:2147483647]	131	1			T18	1		T44	1		T25	1
auto[2147483648:2281701375]	135	1			T1	2		T4	1		T18	1
auto[2281701376:2415919103]	131	1			T16	1		T35	1		T195	1
auto[2415919104:2550136831]	124	1			T25	1		T35	1		T55	1
auto[2550136832:2684354559]	145	1			T1	1		T26	1		T49	1
auto[2684354560:2818572287]	131	1			T36	1		T55	1		T208	1
auto[2818572288:2952790015]	175	1			T35	1		T190	1		T54	1
auto[2952790016:3087007743]	131	1			T1	1		T25	1		T195	1
auto[3087007744:3221225471]	121	1			T1	2		T44	1		T195	1
auto[3221225472:3355443199]	139	1			T1	1		T35	1		T26	1
auto[3355443200:3489660927]	133	1			T25	1		T26	1		T195	1
auto[3489660928:3623878655]	114	1			T1	1		T4	1		T195	1
auto[3623878656:3758096383]	126	1			T44	1		T189	1		T144	2
auto[3758096384:3892314111]	142	1			T55	1		T79	1		T208	1
auto[3892314112:4026531839]	129	1			T4	2		T190	1		T49	1
auto[4026531840:4160749567]	144	1			T4	1		T25	1		T190	1
auto[4160749568:4294967295]	152	1			T4	1		T49	1		T55	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	2795	1			T1	4		T4	14		T18	6
auto[0:134217727]	auto[1]	16	1			T1	1		T116	1		T135	1
auto[134217728:268435455]	auto[0]	156	1			T4	1		T44	1		T86	2
auto[134217728:268435455]	auto[1]	10	1			T79	1		T230	1		T321	1
auto[268435456:402653183]	auto[0]	138	1			T4	1		T18	1		T44	1
auto[268435456:402653183]	auto[1]	5	1			T144	1		T252	1		T232	1
auto[402653184:536870911]	auto[0]	149	1			T26	1		T55	1		T68	1
auto[402653184:536870911]	auto[1]	8	1			T1	1		T116	1		T235	1
auto[536870912:671088639]	auto[0]	148	1			T35	1		T26	1		T197	1
auto[536870912:671088639]	auto[1]	12	1			T116	1		T230	2		T252	2
auto[671088640:805306367]	auto[0]	115	1			T1	1		T44	1		T25	1
auto[671088640:805306367]	auto[1]	11	1			T1	1		T116	1		T231	1
auto[805306368:939524095]	auto[0]	135	1			T44	2		T35	1		T26	1
auto[805306368:939524095]	auto[1]	10	1			T235	1		T238	1		T232	2
auto[939524096:1073741823]	auto[0]	130	1			T25	1		T35	1		T26	1
auto[939524096:1073741823]	auto[1]	9	1			T1	1		T135	1		T250	1
auto[1073741824:1207959551]	auto[0]	118	1			T4	3		T44	1		T197	1
auto[1073741824:1207959551]	auto[1]	12	1			T79	1		T135	1		T230	2
auto[1207959552:1342177279]	auto[0]	113	1			T4	1		T25	1		T35	2
auto[1207959552:1342177279]	auto[1]	6	1			T276	1		T410	2		T411	1
auto[1342177280:1476395007]	auto[0]	132	1			T4	2		T18	1		T26	2
auto[1342177280:1476395007]	auto[1]	5	1			T231	1		T232	1		T280	1
auto[1476395008:1610612735]	auto[0]	125	1			T1	1		T195	1		T189	2
auto[1476395008:1610612735]	auto[1]	9	1			T135	1		T321	1		T250	1
auto[1610612736:1744830463]	auto[0]	107	1			T26	1		T195	1		T208	2
auto[1610612736:1744830463]	auto[1]	12	1			T135	2		T250	1		T356	1
auto[1744830464:1879048191]	auto[0]	127	1			T1	1		T4	1		T18	1
auto[1744830464:1879048191]	auto[1]	13	1			T79	1		T134	1		T252	1
auto[1879048192:2013265919]	auto[0]	93	1			T4	2		T18	1		T35	1
auto[1879048192:2013265919]	auto[1]	12	1			T1	1		T116	1		T135	2
auto[2013265920:2147483647]	auto[0]	118	1			T18	1		T44	1		T25	1
auto[2013265920:2147483647]	auto[1]	13	1			T135	1		T230	1		T231	1
auto[2147483648:2281701375]	auto[0]	125	1			T4	1		T18	1		T108	2
auto[2147483648:2281701375]	auto[1]	10	1			T1	2		T230	1		T250	1
auto[2281701376:2415919103]	auto[0]	126	1			T16	1		T35	1		T195	1
auto[2281701376:2415919103]	auto[1]	5	1			T321	1		T250	1		T273	1
auto[2415919104:2550136831]	auto[0]	112	1			T25	1		T35	1		T55	1
auto[2415919104:2550136831]	auto[1]	12	1			T116	2		T231	1		T250	1
auto[2550136832:2684354559]	auto[0]	133	1			T26	1		T49	1		T55	3
auto[2550136832:2684354559]	auto[1]	12	1			T1	1		T134	1		T321	1
auto[2684354560:2818572287]	auto[0]	118	1			T36	1		T55	1		T208	1
auto[2684354560:2818572287]	auto[1]	13	1			T116	1		T276	1		T356	2
auto[2818572288:2952790015]	auto[0]	159	1			T35	1		T190	1		T54	1
auto[2818572288:2952790015]	auto[1]	16	1			T135	2		T235	1		T238	1
auto[2952790016:3087007743]	auto[0]	119	1			T1	1		T25	1		T195	1
auto[2952790016:3087007743]	auto[1]	12	1			T135	2		T136	1		T238	1
auto[3087007744:3221225471]	auto[0]	113	1			T44	1		T195	1		T36	1
auto[3087007744:3221225471]	auto[1]	8	1			T1	2		T230	1		T280	1
auto[3221225472:3355443199]	auto[0]	125	1			T35	1		T26	1		T195	1
auto[3221225472:3355443199]	auto[1]	14	1			T1	1		T134	1		T238	1
auto[3355443200:3489660927]	auto[0]	125	1			T25	1		T26	1		T195	1
auto[3355443200:3489660927]	auto[1]	8	1			T135	1		T232	1		T280	1
auto[3489660928:3623878655]	auto[0]	107	1			T1	1		T4	1		T195	1
auto[3489660928:3623878655]	auto[1]	7	1			T136	1		T407	1		T271	1
auto[3623878656:3758096383]	auto[0]	118	1			T44	1		T189	1		T144	1
auto[3623878656:3758096383]	auto[1]	8	1			T144	1		T116	1		T276	1
auto[3758096384:3892314111]	auto[0]	134	1			T55	1		T79	1		T208	1
auto[3758096384:3892314111]	auto[1]	8	1			T135	1		T321	1		T276	1
auto[3892314112:4026531839]	auto[0]	124	1			T4	2		T190	1		T49	1
auto[3892314112:4026531839]	auto[1]	5	1			T326	2		T356	1		T408	1
auto[4026531840:4160749567]	auto[0]	136	1			T4	1		T25	1		T190	1
auto[4026531840:4160749567]	auto[1]	8	1			T116	1		T250	1		T276	1
auto[4160749568:4294967295]	auto[0]	142	1			T4	1		T49	1		T55	1
auto[4160749568:4294967295]	auto[1]	10	1			T116	1		T135	1		T397	1