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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4240 1 T1 6 T4 16 T18 10
auto[1] 2210 1 T1 2 T16 2 T18 2



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 216 1 T35 2 T55 2 T46 2
auto[134217728:268435455] 234 1 T26 2 T197 2 T189 2
auto[268435456:402653183] 202 1 T18 2 T108 2 T86 4
auto[402653184:536870911] 214 1 T4 2 T18 2 T44 2
auto[536870912:671088639] 214 1 T4 2 T26 4 T36 2
auto[671088640:805306367] 168 1 T44 2 T54 2 T49 2
auto[805306368:939524095] 186 1 T195 2 T54 2 T55 2
auto[939524096:1073741823] 176 1 T1 2 T4 2 T26 4
auto[1073741824:1207959551] 212 1 T197 2 T189 2 T85 2
auto[1207959552:1342177279] 244 1 T190 2 T144 2 T194 2
auto[1342177280:1476395007] 206 1 T35 2 T26 2 T46 2
auto[1476395008:1610612735] 192 1 T1 2 T4 2 T25 2
auto[1610612736:1744830463] 194 1 T44 2 T68 2 T198 2
auto[1744830464:1879048191] 210 1 T36 2 T55 2 T81 2
auto[1879048192:2013265919] 202 1 T44 2 T35 2 T195 2
auto[2013265920:2147483647] 226 1 T4 2 T25 2 T55 2
auto[2147483648:2281701375] 214 1 T44 2 T35 2 T26 2
auto[2281701376:2415919103] 202 1 T1 2 T25 2 T35 2
auto[2415919104:2550136831] 190 1 T1 2 T18 2 T25 2
auto[2550136832:2684354559] 180 1 T18 2 T108 2 T190 4
auto[2684354560:2818572287] 186 1 T197 2 T49 2 T55 4
auto[2818572288:2952790015] 174 1 T4 2 T54 2 T144 2
auto[2952790016:3087007743] 212 1 T35 2 T190 2 T189 2
auto[3087007744:3221225471] 198 1 T4 2 T44 2 T35 2
auto[3221225472:3355443199] 198 1 T44 2 T54 2 T189 2
auto[3355443200:3489660927] 172 1 T44 2 T26 2 T55 2
auto[3489660928:3623878655] 248 1 T35 2 T36 2 T49 2
auto[3623878656:3758096383] 196 1 T54 2 T55 2 T68 4
auto[3758096384:3892314111] 200 1 T18 2 T36 2 T189 2
auto[3892314112:4026531839] 202 1 T4 2 T55 4 T80 2
auto[4026531840:4160749567] 188 1 T16 2 T18 2 T44 2
auto[4160749568:4294967295] 194 1 T36 2 T116 2 T117 6



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 136 1 T46 2 T6 2 T284 2
auto[0:134217727] auto[1] 80 1 T35 2 T55 2 T113 2
auto[134217728:268435455] auto[0] 168 1 T26 2 T189 2 T55 2
auto[134217728:268435455] auto[1] 66 1 T197 2 T68 2 T92 2
auto[268435456:402653183] auto[0] 142 1 T86 4 T25 2 T55 4
auto[268435456:402653183] auto[1] 60 1 T18 2 T108 2 T54 2
auto[402653184:536870911] auto[0] 136 1 T4 2 T18 2 T189 2
auto[402653184:536870911] auto[1] 78 1 T44 2 T25 2 T55 2
auto[536870912:671088639] auto[0] 134 1 T4 2 T26 2 T55 4
auto[536870912:671088639] auto[1] 80 1 T26 2 T36 2 T80 2
auto[671088640:805306367] auto[0] 126 1 T54 2 T55 2 T201 2
auto[671088640:805306367] auto[1] 42 1 T44 2 T49 2 T79 2
auto[805306368:939524095] auto[0] 142 1 T195 2 T55 2 T46 2
auto[805306368:939524095] auto[1] 44 1 T54 2 T198 2 T192 2
auto[939524096:1073741823] auto[0] 110 1 T1 2 T4 2 T26 4
auto[939524096:1073741823] auto[1] 66 1 T198 2 T117 2 T191 2
auto[1073741824:1207959551] auto[0] 146 1 T197 2 T189 2 T121 2
auto[1073741824:1207959551] auto[1] 66 1 T85 2 T27 2 T283 2
auto[1207959552:1342177279] auto[0] 146 1 T7 2 T38 2 T415 2
auto[1207959552:1342177279] auto[1] 98 1 T190 2 T144 2 T194 2
auto[1342177280:1476395007] auto[0] 130 1 T35 2 T26 2 T201 2
auto[1342177280:1476395007] auto[1] 76 1 T46 2 T60 2 T8 2
auto[1476395008:1610612735] auto[0] 132 1 T1 2 T4 2 T25 2
auto[1476395008:1610612735] auto[1] 60 1 T195 2 T54 2 T60 2
auto[1610612736:1744830463] auto[0] 138 1 T44 2 T68 2 T198 2
auto[1610612736:1744830463] auto[1] 56 1 T47 2 T113 4 T121 2
auto[1744830464:1879048191] auto[0] 136 1 T36 2 T55 2 T81 2
auto[1744830464:1879048191] auto[1] 74 1 T6 2 T7 2 T301 2
auto[1879048192:2013265919] auto[0] 116 1 T44 2 T35 2 T81 2
auto[1879048192:2013265919] auto[1] 86 1 T195 2 T197 2 T114 2
auto[2013265920:2147483647] auto[0] 158 1 T4 2 T25 2 T55 2
auto[2013265920:2147483647] auto[1] 68 1 T79 2 T194 2 T401 2
auto[2147483648:2281701375] auto[0] 138 1 T44 2 T36 2 T117 2
auto[2147483648:2281701375] auto[1] 76 1 T35 2 T26 2 T49 2
auto[2281701376:2415919103] auto[0] 144 1 T1 2 T25 2 T55 2
auto[2281701376:2415919103] auto[1] 58 1 T35 2 T55 2 T79 2
auto[2415919104:2550136831] auto[0] 128 1 T18 2 T25 2 T197 2
auto[2415919104:2550136831] auto[1] 62 1 T1 2 T35 2 T190 2
auto[2550136832:2684354559] auto[0] 112 1 T18 2 T190 2 T208 2
auto[2550136832:2684354559] auto[1] 68 1 T108 2 T190 2 T55 2
auto[2684354560:2818572287] auto[0] 110 1 T197 2 T7 10 T413 2
auto[2684354560:2818572287] auto[1] 76 1 T49 2 T55 4 T61 2
auto[2818572288:2952790015] auto[0] 114 1 T4 2 T144 2 T192 2
auto[2818572288:2952790015] auto[1] 60 1 T54 2 T117 2 T210 2
auto[2952790016:3087007743] auto[0] 116 1 T189 2 T60 2 T192 2
auto[2952790016:3087007743] auto[1] 96 1 T35 2 T190 2 T55 2
auto[3087007744:3221225471] auto[0] 158 1 T4 2 T44 2 T55 2
auto[3087007744:3221225471] auto[1] 40 1 T35 2 T49 2 T55 2
auto[3221225472:3355443199] auto[0] 124 1 T189 2 T85 2 T47 2
auto[3221225472:3355443199] auto[1] 74 1 T44 2 T54 2 T49 2
auto[3355443200:3489660927] auto[0] 106 1 T26 2 T80 2 T47 2
auto[3355443200:3489660927] auto[1] 66 1 T44 2 T55 2 T92 2
auto[3489660928:3623878655] auto[0] 170 1 T35 2 T36 2 T55 4
auto[3489660928:3623878655] auto[1] 78 1 T49 2 T7 2 T245 2
auto[3623878656:3758096383] auto[0] 124 1 T55 2 T68 4 T201 2
auto[3623878656:3758096383] auto[1] 72 1 T54 2 T201 2 T6 2
auto[3758096384:3892314111] auto[0] 126 1 T18 2 T36 2 T189 2
auto[3758096384:3892314111] auto[1] 74 1 T81 2 T144 2 T92 2
auto[3892314112:4026531839] auto[0] 140 1 T4 2 T55 4 T80 2
auto[3892314112:4026531839] auto[1] 62 1 T61 2 T209 2 T91 2
auto[4026531840:4160749567] auto[0] 108 1 T18 2 T86 2 T36 2
auto[4026531840:4160749567] auto[1] 80 1 T16 2 T44 2 T113 2
auto[4160749568:4294967295] auto[0] 126 1 T36 2 T116 2 T117 4
auto[4160749568:4294967295] auto[1] 68 1 T117 2 T211 2 T7 2

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