Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6602

1

T1

11

T3

3

T13

2

auto[1]

313

1

T14

3

T34

4

T127

9

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	2754	1			T1	4		T3	1		T13	1
auto[134217728:268435455]	156	1			T18	2		T38	1		T34	1
auto[268435456:402653183]	179	1			T1	1		T127	1		T46	1
auto[402653184:536870911]	134	1			T18	1		T37	1		T38	1
auto[536870912:671088639]	145	1			T49	1		T107	1		T81	1
auto[671088640:805306367]	118	1			T18	1		T19	1		T126	1
auto[805306368:939524095]	153	1			T18	2		T34	1		T127	1
auto[939524096:1073741823]	139	1			T47	1		T52	2		T140	1
auto[1073741824:1207959551]	134	1			T1	2		T18	1		T37	1
auto[1207959552:1342177279]	152	1			T18	2		T34	1		T27	1
auto[1342177280:1476395007]	131	1			T18	1		T19	1		T46	1
auto[1476395008:1610612735]	122	1			T38	1		T19	1		T127	1
auto[1610612736:1744830463]	132	1			T14	1		T18	2		T34	2
auto[1744830464:1879048191]	119	1			T19	1		T50	1		T47	2
auto[1879048192:2013265919]	111	1			T14	1		T37	1		T19	1
auto[2013265920:2147483647]	128	1			T37	1		T34	1		T19	1
auto[2147483648:2281701375]	135	1			T1	1		T13	1		T14	1
auto[2281701376:2415919103]	133	1			T19	1		T47	3		T48	1
auto[2415919104:2550136831]	118	1			T18	3		T46	1		T50	1
auto[2550136832:2684354559]	123	1			T14	2		T46	2		T50	3
auto[2684354560:2818572287]	119	1			T19	1		T46	1		T27	1
auto[2818572288:2952790015]	118	1			T18	1		T37	1		T38	2
auto[2952790016:3087007743]	121	1			T14	1		T18	1		T37	2
auto[3087007744:3221225471]	153	1			T18	3		T37	1		T127	3
auto[3221225472:3355443199]	134	1			T3	1		T14	1		T18	1
auto[3355443200:3489660927]	121	1			T18	2		T37	1		T19	1
auto[3489660928:3623878655]	154	1			T14	1		T37	3		T38	2
auto[3623878656:3758096383]	134	1			T18	1		T38	1		T19	1
auto[3758096384:3892314111]	164	1			T38	2		T19	1		T49	1
auto[3892314112:4026531839]	125	1			T37	2		T47	2		T107	1
auto[4026531840:4160749567]	135	1			T1	1		T3	1		T37	1
auto[4160749568:4294967295]	121	1			T1	2		T18	2		T50	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	2746	1			T1	4		T3	1		T13	1
auto[0:134217727]	auto[1]	8	1			T409	1		T379	1		T239	1
auto[134217728:268435455]	auto[0]	148	1			T18	2		T38	1		T197	1
auto[134217728:268435455]	auto[1]	8	1			T34	1		T130	1		T358	1
auto[268435456:402653183]	auto[0]	164	1			T1	1		T127	1		T46	1
auto[268435456:402653183]	auto[1]	15	1			T409	1		T358	3		T228	1
auto[402653184:536870911]	auto[0]	121	1			T18	1		T37	1		T38	1
auto[402653184:536870911]	auto[1]	13	1			T131	1		T413	1		T228	1
auto[536870912:671088639]	auto[0]	134	1			T49	1		T107	1		T81	1
auto[536870912:671088639]	auto[1]	11	1			T358	1		T239	1		T413	1
auto[671088640:805306367]	auto[0]	110	1			T18	1		T19	1		T126	1
auto[671088640:805306367]	auto[1]	8	1			T127	1		T413	1		T310	1
auto[805306368:939524095]	auto[0]	141	1			T18	2		T34	1		T27	1
auto[805306368:939524095]	auto[1]	12	1			T127	1		T132	2		T245	1
auto[939524096:1073741823]	auto[0]	128	1			T47	1		T52	2		T130	1
auto[939524096:1073741823]	auto[1]	11	1			T140	1		T409	1		T132	1
auto[1073741824:1207959551]	auto[0]	124	1			T1	2		T18	1		T37	1
auto[1073741824:1207959551]	auto[1]	10	1			T140	1		T379	1		T358	2
auto[1207959552:1342177279]	auto[0]	141	1			T18	2		T27	1		T47	1
auto[1207959552:1342177279]	auto[1]	11	1			T34	1		T395	1		T396	1
auto[1342177280:1476395007]	auto[0]	125	1			T18	1		T19	1		T46	1
auto[1342177280:1476395007]	auto[1]	6	1			T292	1		T228	1		T310	1
auto[1476395008:1610612735]	auto[0]	105	1			T38	1		T19	1		T27	1
auto[1476395008:1610612735]	auto[1]	17	1			T127	1		T130	2		T109	1
auto[1610612736:1744830463]	auto[0]	126	1			T14	1		T18	2		T34	1
auto[1610612736:1744830463]	auto[1]	6	1			T34	1		T130	1		T358	1
auto[1744830464:1879048191]	auto[0]	118	1			T19	1		T50	1		T47	2
auto[1744830464:1879048191]	auto[1]	1	1			T358	1		-	-		-	-
auto[1879048192:2013265919]	auto[0]	105	1			T37	1		T19	1		T49	1
auto[1879048192:2013265919]	auto[1]	6	1			T14	1		T379	2		T323	1
auto[2013265920:2147483647]	auto[0]	117	1			T37	1		T34	1		T19	1
auto[2013265920:2147483647]	auto[1]	11	1			T130	1		T245	1		T358	1
auto[2147483648:2281701375]	auto[0]	122	1			T1	1		T13	1		T14	1
auto[2147483648:2281701375]	auto[1]	13	1			T34	1		T127	1		T131	2
auto[2281701376:2415919103]	auto[0]	123	1			T19	1		T47	3		T48	1
auto[2281701376:2415919103]	auto[1]	10	1			T130	1		T131	1		T245	1
auto[2415919104:2550136831]	auto[0]	113	1			T18	3		T46	1		T50	1
auto[2415919104:2550136831]	auto[1]	5	1			T130	1		T410	1		T411	1
auto[2550136832:2684354559]	auto[0]	115	1			T14	1		T46	2		T50	3
auto[2550136832:2684354559]	auto[1]	8	1			T14	1		T130	2		T239	1
auto[2684354560:2818572287]	auto[0]	116	1			T19	1		T46	1		T27	1
auto[2684354560:2818572287]	auto[1]	3	1			T350	1		T420	1		T378	1
auto[2818572288:2952790015]	auto[0]	108	1			T18	1		T37	1		T38	2
auto[2818572288:2952790015]	auto[1]	10	1			T131	1		T132	1		T358	1
auto[2952790016:3087007743]	auto[0]	107	1			T18	1		T37	2		T38	1
auto[2952790016:3087007743]	auto[1]	14	1			T14	1		T127	2		T409	1
auto[3087007744:3221225471]	auto[0]	138	1			T18	3		T37	1		T127	1
auto[3087007744:3221225471]	auto[1]	15	1			T127	2		T131	1		T358	2
auto[3221225472:3355443199]	auto[0]	123	1			T3	1		T14	1		T18	1
auto[3221225472:3355443199]	auto[1]	11	1			T130	1		T109	1		T245	2
auto[3355443200:3489660927]	auto[0]	120	1			T18	2		T37	1		T19	1
auto[3355443200:3489660927]	auto[1]	1	1			T412	1		-	-		-	-
auto[3489660928:3623878655]	auto[0]	138	1			T14	1		T37	3		T38	2
auto[3489660928:3623878655]	auto[1]	16	1			T132	2		T379	1		T232	1
auto[3623878656:3758096383]	auto[0]	120	1			T18	1		T38	1		T19	1
auto[3623878656:3758096383]	auto[1]	14	1			T127	1		T130	1		T245	1
auto[3758096384:3892314111]	auto[0]	144	1			T38	2		T19	1		T49	1
auto[3758096384:3892314111]	auto[1]	20	1			T109	1		T409	1		T245	1
auto[3892314112:4026531839]	auto[0]	121	1			T37	2		T47	2		T107	1
auto[3892314112:4026531839]	auto[1]	4	1			T358	1		T323	1		T421	2
auto[4026531840:4160749567]	auto[0]	129	1			T1	1		T3	1		T37	1
auto[4026531840:4160749567]	auto[1]	6	1			T109	1		T323	1		T412	1
auto[4160749568:4294967295]	auto[0]	112	1			T1	2		T18	2		T50	1
auto[4160749568:4294967295]	auto[1]	9	1			T358	1		T239	1		T292	1