Unified Coverage Report :: Group Instance : key_version

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6869

1

T1

22

T4

21

T14

12

auto[1]

328

1

T86

7

T109

5

T124

9

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	2918	1			T1	9		T4	8		T14	5
auto[134217728:268435455]	162	1			T1	1		T4	1		T15	1
auto[268435456:402653183]	163	1			T4	1		T86	1		T6	5
auto[402653184:536870911]	173	1			T19	1		T35	1		T6	3
auto[536870912:671088639]	157	1			T14	1		T18	1		T88	1
auto[671088640:805306367]	135	1			T17	1		T18	1		T44	1
auto[805306368:939524095]	146	1			T1	2		T19	1		T35	2
auto[939524096:1073741823]	135	1			T4	1		T6	1		T51	1
auto[1073741824:1207959551]	143	1			T4	1		T86	1		T47	1
auto[1207959552:1342177279]	136	1			T4	1		T18	1		T177	1
auto[1342177280:1476395007]	143	1			T17	1		T105	3		T88	1
auto[1476395008:1610612735]	139	1			T35	1		T86	1		T105	1
auto[1610612736:1744830463]	111	1			T4	1		T18	1		T88	1
auto[1744830464:1879048191]	122	1			T1	1		T4	1		T14	1
auto[1879048192:2013265919]	119	1			T18	1		T90	1		T6	4
auto[2013265920:2147483647]	127	1			T1	2		T15	1		T18	1
auto[2147483648:2281701375]	140	1			T1	1		T17	1		T105	2
auto[2281701376:2415919103]	129	1			T1	1		T4	1		T86	1
auto[2415919104:2550136831]	143	1			T27	1		T6	2		T124	1
auto[2550136832:2684354559]	143	1			T14	1		T18	2		T35	1
auto[2684354560:2818572287]	127	1			T105	1		T109	1		T27	1
auto[2818572288:2952790015]	144	1			T177	1		T6	1		T124	1
auto[2952790016:3087007743]	121	1			T1	2		T14	1		T17	1
auto[3087007744:3221225471]	141	1			T14	1		T105	1		T6	1
auto[3221225472:3355443199]	123	1			T4	1		T109	1		T90	1
auto[3355443200:3489660927]	145	1			T1	1		T4	1		T86	1
auto[3489660928:3623878655]	135	1			T1	1		T17	2		T18	1
auto[3623878656:3758096383]	124	1			T4	1		T14	1		T18	1
auto[3758096384:3892314111]	130	1			T15	1		T109	1		T7	1
auto[3892314112:4026531839]	130	1			T4	2		T14	1		T19	1
auto[4026531840:4160749567]	137	1			T1	1		T35	1		T6	2
auto[4160749568:4294967295]	156	1			T17	1		T109	1		T47	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	2907	1			T1	9		T4	8		T14	5
auto[0:134217727]	auto[1]	11	1			T124	1		T125	1		T315	1
auto[134217728:268435455]	auto[0]	146	1			T1	1		T4	1		T15	1
auto[134217728:268435455]	auto[1]	16	1			T124	1		T126	1		T270	2
auto[268435456:402653183]	auto[0]	153	1			T4	1		T6	5		T53	1
auto[268435456:402653183]	auto[1]	10	1			T86	1		T239	1		T306	1
auto[402653184:536870911]	auto[0]	157	1			T19	1		T35	1		T6	3
auto[402653184:536870911]	auto[1]	16	1			T124	1		T125	2		T239	1
auto[536870912:671088639]	auto[0]	146	1			T14	1		T18	1		T88	1
auto[536870912:671088639]	auto[1]	11	1			T239	1		T376	1		T311	1
auto[671088640:805306367]	auto[0]	129	1			T17	1		T18	1		T44	1
auto[671088640:805306367]	auto[1]	6	1			T124	1		T347	1		T285	1
auto[805306368:939524095]	auto[0]	135	1			T1	2		T19	1		T35	2
auto[805306368:939524095]	auto[1]	11	1			T86	1		T128	1		T239	1
auto[939524096:1073741823]	auto[0]	123	1			T4	1		T6	1		T51	1
auto[939524096:1073741823]	auto[1]	12	1			T128	2		T270	1		T311	1
auto[1073741824:1207959551]	auto[0]	131	1			T4	1		T47	1		T6	5
auto[1073741824:1207959551]	auto[1]	12	1			T86	1		T124	1		T239	1
auto[1207959552:1342177279]	auto[0]	121	1			T4	1		T18	1		T177	1
auto[1207959552:1342177279]	auto[1]	15	1			T128	1		T289	1		T376	2
auto[1342177280:1476395007]	auto[0]	138	1			T17	1		T105	3		T88	1
auto[1342177280:1476395007]	auto[1]	5	1			T306	1		T315	1		T289	1
auto[1476395008:1610612735]	auto[0]	127	1			T35	1		T105	1		T90	2
auto[1476395008:1610612735]	auto[1]	12	1			T86	1		T109	1		T125	2
auto[1610612736:1744830463]	auto[0]	106	1			T4	1		T18	1		T88	1
auto[1610612736:1744830463]	auto[1]	5	1			T126	1		T128	1		T376	1
auto[1744830464:1879048191]	auto[0]	111	1			T1	1		T4	1		T14	1
auto[1744830464:1879048191]	auto[1]	11	1			T239	1		T315	1		T289	1
auto[1879048192:2013265919]	auto[0]	116	1			T18	1		T90	1		T6	4
auto[1879048192:2013265919]	auto[1]	3	1			T311	1		T381	1		T228	1
auto[2013265920:2147483647]	auto[0]	121	1			T1	2		T15	1		T18	1
auto[2013265920:2147483647]	auto[1]	6	1			T239	1		T285	2		T379	1
auto[2147483648:2281701375]	auto[0]	130	1			T1	1		T17	1		T105	2
auto[2147483648:2281701375]	auto[1]	10	1			T109	1		T127	1		T239	1
auto[2281701376:2415919103]	auto[0]	117	1			T1	1		T4	1		T105	2
auto[2281701376:2415919103]	auto[1]	12	1			T86	1		T126	1		T128	1
auto[2415919104:2550136831]	auto[0]	136	1			T27	1		T6	2		T45	3
auto[2415919104:2550136831]	auto[1]	7	1			T124	1		T125	1		T270	1
auto[2550136832:2684354559]	auto[0]	133	1			T14	1		T18	2		T35	1
auto[2550136832:2684354559]	auto[1]	10	1			T289	1		T285	2		T378	1
auto[2684354560:2818572287]	auto[0]	117	1			T105	1		T109	1		T27	1
auto[2684354560:2818572287]	auto[1]	10	1			T124	1		T128	1		T239	1
auto[2818572288:2952790015]	auto[0]	128	1			T177	1		T6	1		T124	1
auto[2818572288:2952790015]	auto[1]	16	1			T127	1		T128	1		T357	1
auto[2952790016:3087007743]	auto[0]	108	1			T1	2		T14	1		T17	1
auto[2952790016:3087007743]	auto[1]	13	1			T86	1		T128	2		T239	1
auto[3087007744:3221225471]	auto[0]	130	1			T14	1		T105	1		T6	1
auto[3087007744:3221225471]	auto[1]	11	1			T125	1		T126	1		T127	1
auto[3221225472:3355443199]	auto[0]	113	1			T4	1		T90	1		T47	1
auto[3221225472:3355443199]	auto[1]	10	1			T109	1		T128	1		T239	1
auto[3355443200:3489660927]	auto[0]	137	1			T1	1		T4	1		T86	1
auto[3355443200:3489660927]	auto[1]	8	1			T109	1		T128	1		T376	1
auto[3489660928:3623878655]	auto[0]	126	1			T1	1		T17	2		T18	1
auto[3489660928:3623878655]	auto[1]	9	1			T109	1		T126	1		T311	1
auto[3623878656:3758096383]	auto[0]	116	1			T4	1		T14	1		T18	1
auto[3623878656:3758096383]	auto[1]	8	1			T128	3		T374	2		T210	1
auto[3758096384:3892314111]	auto[0]	122	1			T15	1		T109	1		T7	1
auto[3758096384:3892314111]	auto[1]	8	1			T239	1		T359	1		T373	1
auto[3892314112:4026531839]	auto[0]	120	1			T4	2		T14	1		T19	1
auto[3892314112:4026531839]	auto[1]	10	1			T86	1		T239	1		T306	1
auto[4026531840:4160749567]	auto[0]	123	1			T1	1		T35	1		T6	2
auto[4026531840:4160749567]	auto[1]	14	1			T124	2		T126	2		T239	1
auto[4160749568:4294967295]	auto[0]	146	1			T17	1		T109	1		T47	1
auto[4160749568:4294967295]	auto[1]	10	1			T239	1		T270	1		T289	1