Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4456

1

T3

12

T4

2

T16

10

auto[1]

2302

1

T4

6

T15

4

T18

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	226	1			T183	2		T57	2		T113	2
auto[134217728:268435455]	228	1			T66	2		T187	4		T27	2
auto[268435456:402653183]	190	1			T18	2		T36	4		T44	2
auto[402653184:536870911]	196	1			T26	2		T44	2		T77	2
auto[536870912:671088639]	224	1			T3	2		T24	2		T66	2
auto[671088640:805306367]	172	1			T36	2		T26	2		T44	2
auto[805306368:939524095]	262	1			T36	2		T44	4		T46	2
auto[939524096:1073741823]	206	1			T26	2		T183	2		T68	2
auto[1073741824:1207959551]	206	1			T3	2		T44	4		T78	2
auto[1207959552:1342177279]	190	1			T3	2		T16	2		T37	2
auto[1342177280:1476395007]	240	1			T36	2		T26	2		T44	2
auto[1476395008:1610612735]	224	1			T3	2		T24	2		T36	2
auto[1610612736:1744830463]	180	1			T4	2		T24	2		T26	2
auto[1744830464:1879048191]	228	1			T4	2		T23	2		T24	2
auto[1879048192:2013265919]	198	1			T37	2		T57	2		T77	2
auto[2013265920:2147483647]	218	1			T16	2		T44	6		T56	2
auto[2147483648:2281701375]	206	1			T18	2		T183	2		T44	6
auto[2281701376:2415919103]	240	1			T36	2		T187	2		T42	4
auto[2415919104:2550136831]	186	1			T187	2		T27	2		T46	2
auto[2550136832:2684354559]	196	1			T44	4		T42	2		T327	2
auto[2684354560:2818572287]	188	1			T66	2		T183	2		T42	4
auto[2818572288:2952790015]	216	1			T4	2		T24	2		T183	2
auto[2952790016:3087007743]	182	1			T23	2		T42	2		T232	2
auto[3087007744:3221225471]	224	1			T3	2		T15	2		T23	2
auto[3221225472:3355443199]	232	1			T3	2		T16	2		T36	2
auto[3355443200:3489660927]	192	1			T18	2		T187	2		T27	2
auto[3489660928:3623878655]	232	1			T26	2		T66	2		T44	8
auto[3623878656:3758096383]	212	1			T15	2		T16	2		T26	2
auto[3758096384:3892314111]	226	1			T4	2		T26	2		T44	2
auto[3892314112:4026531839]	228	1			T16	2		T24	2		T183	2
auto[4026531840:4160749567]	194	1			T18	2		T37	2		T44	6
auto[4160749568:4294967295]	216	1			T42	4		T194	2		T193	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	150	1			T113	2		T51	2		T47	2
auto[0:134217727]	auto[1]	76	1			T183	2		T57	2		T51	2
auto[134217728:268435455]	auto[0]	160	1			T66	2		T187	4		T44	2
auto[134217728:268435455]	auto[1]	68	1			T27	2		T57	2		T121	2
auto[268435456:402653183]	auto[0]	132	1			T18	2		T36	2		T44	2
auto[268435456:402653183]	auto[1]	58	1			T36	2		T42	2		T7	2
auto[402653184:536870911]	auto[0]	142	1			T26	2		T44	2		T77	2
auto[402653184:536870911]	auto[1]	54	1			T223	2		T98	2		T272	2
auto[536870912:671088639]	auto[0]	138	1			T3	2		T24	2		T66	2
auto[536870912:671088639]	auto[1]	86	1			T187	2		T44	2		T192	2
auto[671088640:805306367]	auto[0]	104	1			T113	2		T51	2		T7	2
auto[671088640:805306367]	auto[1]	68	1			T36	2		T26	2		T44	2
auto[805306368:939524095]	auto[0]	168	1			T36	2		T44	4		T46	2
auto[805306368:939524095]	auto[1]	94	1			T123	2		T64	2		T318	2
auto[939524096:1073741823]	auto[0]	146	1			T26	2		T183	2		T68	2
auto[939524096:1073741823]	auto[1]	60	1			T223	2		T99	2		T272	2
auto[1073741824:1207959551]	auto[0]	138	1			T3	2		T44	4		T263	2
auto[1073741824:1207959551]	auto[1]	68	1			T78	2		T5	2		T192	2
auto[1207959552:1342177279]	auto[0]	138	1			T3	2		T16	2		T37	2
auto[1207959552:1342177279]	auto[1]	52	1			T44	4		T223	2		T99	2
auto[1342177280:1476395007]	auto[0]	166	1			T44	2		T56	2		T42	4
auto[1342177280:1476395007]	auto[1]	74	1			T36	2		T26	2		T57	2
auto[1476395008:1610612735]	auto[0]	132	1			T3	2		T24	2		T187	2
auto[1476395008:1610612735]	auto[1]	92	1			T36	2		T44	2		T195	2
auto[1610612736:1744830463]	auto[0]	124	1			T24	2		T26	2		T44	2
auto[1610612736:1744830463]	auto[1]	56	1			T4	2		T44	2		T190	2
auto[1744830464:1879048191]	auto[0]	166	1			T23	2		T24	2		T66	2
auto[1744830464:1879048191]	auto[1]	62	1			T4	2		T46	2		T98	2
auto[1879048192:2013265919]	auto[0]	132	1			T37	2		T57	2		T77	2
auto[1879048192:2013265919]	auto[1]	66	1			T136	2		T7	2		T69	2
auto[2013265920:2147483647]	auto[0]	132	1			T16	2		T44	4		T56	2
auto[2013265920:2147483647]	auto[1]	86	1			T44	2		T47	2		T177	2
auto[2147483648:2281701375]	auto[0]	142	1			T18	2		T183	2		T44	6
auto[2147483648:2281701375]	auto[1]	64	1			T6	2		T177	2		T357	2
auto[2281701376:2415919103]	auto[0]	152	1			T36	2		T187	2		T42	4
auto[2281701376:2415919103]	auto[1]	88	1			T232	2		T194	2		T51	2
auto[2415919104:2550136831]	auto[0]	128	1			T113	2		T121	2		T47	2
auto[2415919104:2550136831]	auto[1]	58	1			T187	2		T27	2		T46	2
auto[2550136832:2684354559]	auto[0]	140	1			T44	4		T42	2		T327	2
auto[2550136832:2684354559]	auto[1]	56	1			T30	2		T60	2		T7	2
auto[2684354560:2818572287]	auto[0]	130	1			T66	2		T183	2		T42	4
auto[2684354560:2818572287]	auto[1]	58	1			T303	2		T98	2		T99	2
auto[2818572288:2952790015]	auto[0]	134	1			T24	2		T183	2		T44	2
auto[2818572288:2952790015]	auto[1]	82	1			T4	2		T44	4		T193	2
auto[2952790016:3087007743]	auto[0]	124	1			T23	2		T98	4		T99	2
auto[2952790016:3087007743]	auto[1]	58	1			T42	2		T232	2		T64	2
auto[3087007744:3221225471]	auto[0]	162	1			T3	2		T24	2		T36	2
auto[3087007744:3221225471]	auto[1]	62	1			T15	2		T23	2		T44	2
auto[3221225472:3355443199]	auto[0]	172	1			T3	2		T16	2		T36	2
auto[3221225472:3355443199]	auto[1]	60	1			T44	2		T48	2		T64	2
auto[3355443200:3489660927]	auto[0]	114	1			T187	2		T46	2		T193	2
auto[3355443200:3489660927]	auto[1]	78	1			T18	2		T27	2		T98	2
auto[3489660928:3623878655]	auto[0]	144	1			T26	2		T66	2		T44	8
auto[3489660928:3623878655]	auto[1]	88	1			T56	2		T263	2		T21	2
auto[3623878656:3758096383]	auto[0]	132	1			T16	2		T57	2		T46	2
auto[3623878656:3758096383]	auto[1]	80	1			T15	2		T26	2		T57	2
auto[3758096384:3892314111]	auto[0]	140	1			T4	2		T26	2		T6	2
auto[3758096384:3892314111]	auto[1]	86	1			T44	2		T57	2		T42	2
auto[3892314112:4026531839]	auto[0]	142	1			T16	2		T183	2		T42	2
auto[3892314112:4026531839]	auto[1]	86	1			T24	2		T44	4		T327	2
auto[4026531840:4160749567]	auto[0]	122	1			T44	4		T42	2		T135	2
auto[4026531840:4160749567]	auto[1]	72	1			T18	2		T37	2		T44	2
auto[4160749568:4294967295]	auto[0]	110	1			T42	4		T264	2		T54	4
auto[4160749568:4294967295]	auto[1]	106	1			T194	2		T193	2		T51	2