Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4676

1

T1

4

T3

6

T13

12

auto[1]

2356

1

T1

2

T2

6

T16

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	230	1			T44	2		T124	2		T45	2
auto[134217728:268435455]	218	1			T13	2		T88	2		T44	6
auto[268435456:402653183]	202	1			T2	2		T24	2		T48	4
auto[402653184:536870911]	174	1			T87	2		T44	2		T122	2
auto[536870912:671088639]	220	1			T44	4		T46	2		T185	2
auto[671088640:805306367]	226	1			T1	2		T3	2		T44	2
auto[805306368:939524095]	218	1			T34	2		T139	2		T44	2
auto[939524096:1073741823]	236	1			T44	2		T122	2		T45	6
auto[1073741824:1207959551]	234	1			T13	2		T19	2		T44	4
auto[1207959552:1342177279]	214	1			T19	2		T88	2		T44	2
auto[1342177280:1476395007]	222	1			T44	4		T46	4		T140	2
auto[1476395008:1610612735]	248	1			T3	2		T13	2		T44	4
auto[1610612736:1744830463]	210	1			T44	2		T95	2		T45	2
auto[1744830464:1879048191]	204	1			T16	4		T44	2		T195	2
auto[1879048192:2013265919]	216	1			T67	2		T45	6		T46	4
auto[2013265920:2147483647]	178	1			T1	2		T3	2		T16	2
auto[2147483648:2281701375]	214	1			T13	2		T139	2		T44	4
auto[2281701376:2415919103]	254	1			T19	2		T44	10		T195	2
auto[2415919104:2550136831]	222	1			T2	2		T13	2		T122	2
auto[2550136832:2684354559]	208	1			T2	2		T44	2		T126	2
auto[2684354560:2818572287]	224	1			T18	2		T87	2		T44	2
auto[2818572288:2952790015]	212	1			T16	2		T44	4		T95	2
auto[2952790016:3087007743]	224	1			T1	2		T16	2		T44	2
auto[3087007744:3221225471]	216	1			T44	2		T45	8		T61	2
auto[3221225472:3355443199]	242	1			T36	2		T123	2		T45	4
auto[3355443200:3489660927]	264	1			T87	4		T44	4		T20	2
auto[3489660928:3623878655]	218	1			T34	2		T44	6		T126	2
auto[3623878656:3758096383]	260	1			T34	2		T20	2		T196	2
auto[3758096384:3892314111]	198	1			T44	4		T24	2		T45	4
auto[3892314112:4026531839]	226	1			T44	6		T36	2		T23	2
auto[4026531840:4160749567]	204	1			T44	2		T36	2		T48	2
auto[4160749568:4294967295]	196	1			T13	2		T44	2		T122	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	156	1			T44	2		T124	2		T273	2
auto[0:134217727]	auto[1]	74	1			T45	2		T46	2		T59	2
auto[134217728:268435455]	auto[0]	128	1			T13	2		T88	2		T44	2
auto[134217728:268435455]	auto[1]	90	1			T44	4		T45	2		T65	2
auto[268435456:402653183]	auto[0]	148	1			T24	2		T48	4		T45	2
auto[268435456:402653183]	auto[1]	54	1			T2	2		T46	4		T129	2
auto[402653184:536870911]	auto[0]	118	1			T87	2		T122	2		T126	2
auto[402653184:536870911]	auto[1]	56	1			T44	2		T194	2		T95	2
auto[536870912:671088639]	auto[0]	134	1			T185	2		T25	2		T140	2
auto[536870912:671088639]	auto[1]	86	1			T44	4		T46	2		T25	2
auto[671088640:805306367]	auto[0]	138	1			T1	2		T3	2		T44	2
auto[671088640:805306367]	auto[1]	88	1			T199	2		T53	2		T127	2
auto[805306368:939524095]	auto[0]	144	1			T34	2		T139	2		T45	2
auto[805306368:939524095]	auto[1]	74	1			T44	2		T36	2		T37	2
auto[939524096:1073741823]	auto[0]	158	1			T44	2		T122	2		T45	4
auto[939524096:1073741823]	auto[1]	78	1			T45	2		T192	2		T197	2
auto[1073741824:1207959551]	auto[0]	142	1			T13	2		T23	2		T45	6
auto[1073741824:1207959551]	auto[1]	92	1			T19	2		T44	4		T52	2
auto[1207959552:1342177279]	auto[0]	152	1			T19	2		T44	2		T36	2
auto[1207959552:1342177279]	auto[1]	62	1			T88	2		T235	2		T103	2
auto[1342177280:1476395007]	auto[0]	144	1			T44	4		T46	4		T140	2
auto[1342177280:1476395007]	auto[1]	78	1			T118	2		T200	2		T186	2
auto[1476395008:1610612735]	auto[0]	164	1			T3	2		T13	2		T44	4
auto[1476395008:1610612735]	auto[1]	84	1			T20	2		T199	2		T186	2
auto[1610612736:1744830463]	auto[0]	154	1			T95	2		T45	2		T185	2
auto[1610612736:1744830463]	auto[1]	56	1			T44	2		T316	2		T69	2
auto[1744830464:1879048191]	auto[0]	136	1			T16	2		T44	2		T195	2
auto[1744830464:1879048191]	auto[1]	68	1			T16	2		T46	2		T118	2
auto[1879048192:2013265919]	auto[0]	122	1			T67	2		T45	2		T46	2
auto[1879048192:2013265919]	auto[1]	94	1			T45	4		T46	2		T118	2
auto[2013265920:2147483647]	auto[0]	112	1			T1	2		T3	2		T16	2
auto[2013265920:2147483647]	auto[1]	66	1			T18	2		T44	2		T37	2
auto[2147483648:2281701375]	auto[0]	132	1			T13	2		T44	2		T46	4
auto[2147483648:2281701375]	auto[1]	82	1			T139	2		T44	2		T125	2
auto[2281701376:2415919103]	auto[0]	158	1			T19	2		T44	8		T195	2
auto[2281701376:2415919103]	auto[1]	96	1			T44	2		T199	2		T46	2
auto[2415919104:2550136831]	auto[0]	146	1			T13	2		T122	2		T124	2
auto[2415919104:2550136831]	auto[1]	76	1			T2	2		T124	2		T45	2
auto[2550136832:2684354559]	auto[0]	128	1			T126	2		T24	2		T67	2
auto[2550136832:2684354559]	auto[1]	80	1			T2	2		T44	2		T46	4
auto[2684354560:2818572287]	auto[0]	144	1			T87	2		T44	2		T126	2
auto[2684354560:2818572287]	auto[1]	80	1			T18	2		T127	2		T129	2
auto[2818572288:2952790015]	auto[0]	144	1			T16	2		T44	2		T95	2
auto[2818572288:2952790015]	auto[1]	68	1			T44	2		T270	2		T68	2
auto[2952790016:3087007743]	auto[0]	148	1			T16	2		T44	2		T37	2
auto[2952790016:3087007743]	auto[1]	76	1			T1	2		T122	2		T46	2
auto[3087007744:3221225471]	auto[0]	148	1			T44	2		T45	8		T61	2
auto[3087007744:3221225471]	auto[1]	68	1			T46	2		T40	2		T119	2
auto[3221225472:3355443199]	auto[0]	160	1			T36	2		T123	2		T46	6
auto[3221225472:3355443199]	auto[1]	82	1			T45	4		T127	2		T119	2
auto[3355443200:3489660927]	auto[0]	184	1			T44	4		T20	2		T67	2
auto[3355443200:3489660927]	auto[1]	80	1			T87	4		T59	2		T56	2
auto[3489660928:3623878655]	auto[0]	150	1			T34	2		T44	6		T126	2
auto[3489660928:3623878655]	auto[1]	68	1			T196	2		T61	2		T46	4
auto[3623878656:3758096383]	auto[0]	186	1			T34	2		T20	2		T196	2
auto[3623878656:3758096383]	auto[1]	74	1			T56	2		T68	2		T103	2
auto[3758096384:3892314111]	auto[0]	148	1			T44	2		T24	2		T45	4
auto[3758096384:3892314111]	auto[1]	50	1			T44	2		T197	2		T73	2
auto[3892314112:4026531839]	auto[0]	162	1			T44	6		T23	2		T48	2
auto[3892314112:4026531839]	auto[1]	64	1			T36	2		T56	2		T186	2
auto[4026531840:4160749567]	auto[0]	154	1			T44	2		T36	2		T48	2
auto[4026531840:4160749567]	auto[1]	50	1			T46	4		T62	2		T227	2
auto[4160749568:4294967295]	auto[0]	134	1			T13	2		T44	2		T122	2
auto[4160749568:4294967295]	auto[1]	62	1			T52	2		T62	2		T227	2