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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3098 1 T3 17 T14 2 T15 4
auto[1] 293 1 T18 5 T143 8 T132 5



Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 109 1 T131 1 T66 3 T211 1
auto[134217728:268435455] 108 1 T18 2 T35 2 T48 1
auto[268435456:402653183] 102 1 T18 1 T23 1 T38 1
auto[402653184:536870911] 123 1 T3 1 T101 1 T26 1
auto[536870912:671088639] 105 1 T3 1 T38 1 T129 1
auto[671088640:805306367] 108 1 T23 1 T51 1 T65 1
auto[805306368:939524095] 126 1 T35 1 T30 1 T52 1
auto[939524096:1073741823] 100 1 T3 1 T80 1 T46 1
auto[1073741824:1207959551] 104 1 T26 2 T66 1 T47 1
auto[1207959552:1342177279] 120 1 T88 1 T26 1 T66 2
auto[1342177280:1476395007] 105 1 T3 1 T14 1 T15 1
auto[1476395008:1610612735] 103 1 T38 1 T66 1 T47 1
auto[1610612736:1744830463] 117 1 T18 1 T66 1 T45 1
auto[1744830464:1879048191] 100 1 T3 2 T18 1 T65 1
auto[1879048192:2013265919] 104 1 T3 1 T18 1 T44 1
auto[2013265920:2147483647] 92 1 T18 1 T44 1 T88 1
auto[2147483648:2281701375] 113 1 T3 1 T129 2 T66 2
auto[2281701376:2415919103] 92 1 T14 1 T23 1 T88 2
auto[2415919104:2550136831] 85 1 T101 2 T46 1 T52 1
auto[2550136832:2684354559] 102 1 T3 1 T101 1 T66 1
auto[2684354560:2818572287] 89 1 T3 1 T35 1 T38 1
auto[2818572288:2952790015] 121 1 T3 1 T82 1 T88 1
auto[2952790016:3087007743] 108 1 T18 1 T45 1 T46 1
auto[3087007744:3221225471] 118 1 T3 2 T35 1 T65 1
auto[3221225472:3355443199] 123 1 T3 1 T15 1 T18 2
auto[3355443200:3489660927] 108 1 T101 1 T131 1 T207 1
auto[3489660928:3623878655] 102 1 T3 1 T44 1 T52 1
auto[3623878656:3758096383] 99 1 T3 1 T88 1 T26 1
auto[3758096384:3892314111] 104 1 T15 1 T23 1 T38 1
auto[3892314112:4026531839] 98 1 T18 1 T88 1 T66 3
auto[4026531840:4160749567] 103 1 T18 1 T129 1 T66 2
auto[4160749568:4294967295] 100 1 T3 1 T15 1 T18 1



Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 99 1 T131 1 T66 3 T211 1
auto[0:134217727] auto[1] 10 1 T237 1 T331 3 T388 1
auto[134217728:268435455] auto[0] 102 1 T18 1 T35 2 T48 1
auto[134217728:268435455] auto[1] 6 1 T18 1 T234 1 T304 1
auto[268435456:402653183] auto[0] 97 1 T18 1 T23 1 T38 1
auto[268435456:402653183] auto[1] 5 1 T237 1 T331 1 T387 1
auto[402653184:536870911] auto[0] 114 1 T3 1 T101 1 T26 1
auto[402653184:536870911] auto[1] 9 1 T238 1 T331 1 T234 1
auto[536870912:671088639] auto[0] 96 1 T3 1 T38 1 T129 1
auto[536870912:671088639] auto[1] 9 1 T143 1 T288 1 T274 1
auto[671088640:805306367] auto[0] 100 1 T23 1 T51 1 T65 1
auto[671088640:805306367] auto[1] 8 1 T143 1 T385 1 T404 1
auto[805306368:939524095] auto[0] 114 1 T35 1 T30 1 T52 1
auto[805306368:939524095] auto[1] 12 1 T288 1 T325 1 T274 1
auto[939524096:1073741823] auto[0] 87 1 T3 1 T80 1 T46 1
auto[939524096:1073741823] auto[1] 13 1 T143 1 T238 1 T237 1
auto[1073741824:1207959551] auto[0] 98 1 T26 2 T66 1 T47 1
auto[1073741824:1207959551] auto[1] 6 1 T132 1 T133 1 T135 1
auto[1207959552:1342177279] auto[0] 109 1 T88 1 T26 1 T66 2
auto[1207959552:1342177279] auto[1] 11 1 T234 1 T274 1 T296 2
auto[1342177280:1476395007] auto[0] 99 1 T3 1 T14 1 T15 1
auto[1342177280:1476395007] auto[1] 6 1 T238 1 T282 1 T408 1
auto[1476395008:1610612735] auto[0] 100 1 T38 1 T66 1 T47 1
auto[1476395008:1610612735] auto[1] 3 1 T349 1 T311 1 T414 1
auto[1610612736:1744830463] auto[0] 103 1 T18 1 T66 1 T45 1
auto[1610612736:1744830463] auto[1] 14 1 T143 1 T238 1 T237 1
auto[1744830464:1879048191] auto[0] 89 1 T3 2 T65 1 T48 1
auto[1744830464:1879048191] auto[1] 11 1 T18 1 T349 1 T403 1
auto[1879048192:2013265919] auto[0] 87 1 T3 1 T18 1 T44 1
auto[1879048192:2013265919] auto[1] 17 1 T238 1 T325 1 T260 1
auto[2013265920:2147483647] auto[0] 80 1 T18 1 T44 1 T88 1
auto[2013265920:2147483647] auto[1] 12 1 T260 1 T349 1 T403 4
auto[2147483648:2281701375] auto[0] 99 1 T3 1 T129 2 T66 2
auto[2147483648:2281701375] auto[1] 14 1 T288 1 T274 1 T349 1
auto[2281701376:2415919103] auto[0] 78 1 T14 1 T23 1 T88 2
auto[2281701376:2415919103] auto[1] 14 1 T143 1 T133 1 T238 1
auto[2415919104:2550136831] auto[0] 78 1 T101 2 T46 1 T52 1
auto[2415919104:2550136831] auto[1] 7 1 T386 1 T408 1 T345 1
auto[2550136832:2684354559] auto[0] 92 1 T3 1 T101 1 T66 1
auto[2550136832:2684354559] auto[1] 10 1 T133 1 T234 1 T260 1
auto[2684354560:2818572287] auto[0] 84 1 T3 1 T35 1 T38 1
auto[2684354560:2818572287] auto[1] 5 1 T238 1 T237 1 T288 1
auto[2818572288:2952790015] auto[0] 116 1 T3 1 T82 1 T88 1
auto[2818572288:2952790015] auto[1] 5 1 T383 1 T288 1 T388 1
auto[2952790016:3087007743] auto[0] 101 1 T18 1 T45 1 T46 1
auto[2952790016:3087007743] auto[1] 7 1 T274 1 T386 1 T408 1
auto[3087007744:3221225471] auto[0] 108 1 T3 2 T35 1 T65 1
auto[3087007744:3221225471] auto[1] 10 1 T132 1 T133 1 T325 1
auto[3221225472:3355443199] auto[0] 106 1 T3 1 T15 1 T18 1
auto[3221225472:3355443199] auto[1] 17 1 T18 1 T143 1 T238 2
auto[3355443200:3489660927] auto[0] 100 1 T101 1 T131 1 T207 1
auto[3355443200:3489660927] auto[1] 8 1 T132 1 T238 1 T237 1
auto[3489660928:3623878655] auto[0] 94 1 T3 1 T44 1 T52 1
auto[3489660928:3623878655] auto[1] 8 1 T132 1 T237 1 T234 1
auto[3623878656:3758096383] auto[0] 95 1 T3 1 T88 1 T26 1
auto[3623878656:3758096383] auto[1] 4 1 T143 1 T237 1 T408 1
auto[3758096384:3892314111] auto[0] 98 1 T15 1 T23 1 T38 1
auto[3758096384:3892314111] auto[1] 6 1 T234 1 T260 1 T416 1
auto[3892314112:4026531839] auto[0] 93 1 T88 1 T66 3 T46 1
auto[3892314112:4026531839] auto[1] 5 1 T18 1 T132 1 T274 1
auto[4026531840:4160749567] auto[0] 93 1 T18 1 T129 1 T66 2
auto[4026531840:4160749567] auto[1] 10 1 T133 1 T237 1 T383 1
auto[4160749568:4294967295] auto[0] 89 1 T3 1 T15 1 T38 1
auto[4160749568:4294967295] auto[1] 11 1 T18 1 T143 1 T331 1

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