Unified Coverage Report :: Group Instance : salt_6

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

2787

1

T2

3

T4

5

T16

2

auto[1]

276

1

T16

9

T38

15

T150

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	78	1			T38	1		T26	1		T217	1
auto[134217728:268435455]	100	1			T38	2		T39	1		T26	1
auto[268435456:402653183]	77	1			T17	1		T65	1		T148	1
auto[402653184:536870911]	107	1			T16	1		T38	1		T65	1
auto[536870912:671088639]	99	1			T4	1		T39	1		T28	1
auto[671088640:805306367]	94	1			T38	1		T41	1		T28	1
auto[805306368:939524095]	97	1			T17	1		T38	2		T26	1
auto[939524096:1073741823]	107	1			T38	2		T28	1		T65	1
auto[1073741824:1207959551]	87	1			T2	1		T41	1		T214	1
auto[1207959552:1342177279]	104	1			T16	1		T38	1		T39	1
auto[1342177280:1476395007]	98	1			T16	1		T17	1		T217	1
auto[1476395008:1610612735]	89	1			T4	1		T16	1		T39	1
auto[1610612736:1744830463]	84	1			T17	2		T38	1		T65	2
auto[1744830464:1879048191]	106	1			T38	1		T39	1		T27	1
auto[1879048192:2013265919]	99	1			T19	1		T65	1		T150	2
auto[2013265920:2147483647]	92	1			T38	1		T50	1		T145	1
auto[2147483648:2281701375]	100	1			T39	1		T65	1		T212	1
auto[2281701376:2415919103]	106	1			T2	1		T16	1		T38	1
auto[2415919104:2550136831]	99	1			T16	1		T39	1		T27	1
auto[2550136832:2684354559]	87	1			T39	1		T19	1		T151	1
auto[2684354560:2818572287]	95	1			T4	1		T16	1		T38	2
auto[2818572288:2952790015]	82	1			T28	2		T66	1		T76	1
auto[2952790016:3087007743]	123	1			T4	1		T17	1		T38	1
auto[3087007744:3221225471]	100	1			T39	2		T70	1		T66	1
auto[3221225472:3355443199]	99	1			T28	1		T65	1		T150	3
auto[3355443200:3489660927]	86	1			T39	1		T65	1		T147	1
auto[3489660928:3623878655]	90	1			T4	1		T16	1		T28	1
auto[3623878656:3758096383]	87	1			T16	1		T38	1		T65	1
auto[3758096384:3892314111]	97	1			T38	1		T65	1		T215	1
auto[3892314112:4026531839]	101	1			T16	1		T70	1		T65	1
auto[4026531840:4160749567]	102	1			T41	1		T65	1		T151	1
auto[4160749568:4294967295]	91	1			T2	1		T16	1		T26	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	64	1			T26	1		T217	1		T51	1
auto[0:134217727]	auto[1]	14	1			T38	1		T211	1		T306	1
auto[134217728:268435455]	auto[0]	95	1			T38	2		T39	1		T26	1
auto[134217728:268435455]	auto[1]	5	1			T151	1		T152	1		T311	1
auto[268435456:402653183]	auto[0]	72	1			T17	1		T65	1		T148	1
auto[268435456:402653183]	auto[1]	5	1			T245	1		T316	1		T408	1
auto[402653184:536870911]	auto[0]	97	1			T65	1		T151	1		T113	1
auto[402653184:536870911]	auto[1]	10	1			T16	1		T38	1		T250	1
auto[536870912:671088639]	auto[0]	90	1			T4	1		T39	1		T28	1
auto[536870912:671088639]	auto[1]	9	1			T152	1		T95	1		T280	1
auto[671088640:805306367]	auto[0]	87	1			T38	1		T41	1		T28	1
auto[671088640:805306367]	auto[1]	7	1			T153	1		T348	1		T156	1
auto[805306368:939524095]	auto[0]	90	1			T17	1		T26	1		T27	1
auto[805306368:939524095]	auto[1]	7	1			T38	2		T152	1		T285	2
auto[939524096:1073741823]	auto[0]	93	1			T28	1		T65	1		T147	1
auto[939524096:1073741823]	auto[1]	14	1			T38	2		T245	1		T348	1
auto[1073741824:1207959551]	auto[0]	82	1			T2	1		T41	1		T214	1
auto[1073741824:1207959551]	auto[1]	5	1			T250	2		T311	1		T246	1
auto[1207959552:1342177279]	auto[0]	95	1			T39	1		T218	1		T66	2
auto[1207959552:1342177279]	auto[1]	9	1			T16	1		T38	1		T280	1
auto[1342177280:1476395007]	auto[0]	94	1			T16	1		T17	1		T217	1
auto[1342177280:1476395007]	auto[1]	4	1			T268	1		T285	1		T383	1
auto[1476395008:1610612735]	auto[0]	85	1			T4	1		T39	1		T148	1
auto[1476395008:1610612735]	auto[1]	4	1			T16	1		T422	1		T412	1
auto[1610612736:1744830463]	auto[0]	76	1			T17	2		T65	2		T51	1
auto[1610612736:1744830463]	auto[1]	8	1			T38	1		T245	1		T306	1
auto[1744830464:1879048191]	auto[0]	98	1			T39	1		T27	1		T145	1
auto[1744830464:1879048191]	auto[1]	8	1			T38	1		T245	1		T306	1
auto[1879048192:2013265919]	auto[0]	89	1			T19	1		T65	1		T217	1
auto[1879048192:2013265919]	auto[1]	10	1			T150	2		T152	1		T259	1
auto[2013265920:2147483647]	auto[0]	80	1			T50	1		T145	1		T65	2
auto[2013265920:2147483647]	auto[1]	12	1			T38	1		T250	1		T306	1
auto[2147483648:2281701375]	auto[0]	94	1			T39	1		T65	1		T212	1
auto[2147483648:2281701375]	auto[1]	6	1			T153	1		T311	1		T307	1
auto[2281701376:2415919103]	auto[0]	97	1			T2	1		T16	1		T39	1
auto[2281701376:2415919103]	auto[1]	9	1			T38	1		T150	1		T245	1
auto[2415919104:2550136831]	auto[0]	86	1			T39	1		T27	1		T50	1
auto[2415919104:2550136831]	auto[1]	13	1			T16	1		T151	1		T245	1
auto[2550136832:2684354559]	auto[0]	77	1			T39	1		T19	1		T151	1
auto[2550136832:2684354559]	auto[1]	10	1			T250	1		T280	1		T408	1
auto[2684354560:2818572287]	auto[0]	87	1			T4	1		T38	1		T41	1
auto[2684354560:2818572287]	auto[1]	8	1			T16	1		T38	1		T211	1
auto[2818572288:2952790015]	auto[0]	75	1			T28	2		T66	1		T76	1
auto[2818572288:2952790015]	auto[1]	7	1			T250	1		T153	1		T95	1
auto[2952790016:3087007743]	auto[0]	111	1			T4	1		T17	1		T150	1
auto[2952790016:3087007743]	auto[1]	12	1			T38	1		T152	1		T245	1
auto[3087007744:3221225471]	auto[0]	95	1			T39	2		T70	1		T66	1
auto[3087007744:3221225471]	auto[1]	5	1			T246	1		T408	2		T420	1
auto[3221225472:3355443199]	auto[0]	88	1			T28	1		T65	1		T150	2
auto[3221225472:3355443199]	auto[1]	11	1			T150	1		T348	1		T306	2
auto[3355443200:3489660927]	auto[0]	81	1			T39	1		T65	1		T147	1
auto[3355443200:3489660927]	auto[1]	5	1			T211	2		T348	1		T365	1
auto[3489660928:3623878655]	auto[0]	78	1			T4	1		T28	1		T214	1
auto[3489660928:3623878655]	auto[1]	12	1			T16	1		T250	1		T153	1
auto[3623878656:3758096383]	auto[0]	79	1			T65	1		T217	1		T210	1
auto[3623878656:3758096383]	auto[1]	8	1			T16	1		T38	1		T245	1
auto[3758096384:3892314111]	auto[0]	85	1			T65	1		T215	1		T113	1
auto[3758096384:3892314111]	auto[1]	12	1			T38	1		T250	1		T306	1
auto[3892314112:4026531839]	auto[0]	94	1			T70	1		T65	1		T59	1
auto[3892314112:4026531839]	auto[1]	7	1			T16	1		T245	1		T246	1
auto[4026531840:4160749567]	auto[0]	91	1			T41	1		T65	1		T151	1
auto[4026531840:4160749567]	auto[1]	11	1			T250	1		T211	1		T153	1
auto[4160749568:4294967295]	auto[0]	82	1			T2	1		T26	1		T27	1
auto[4160749568:4294967295]	auto[1]	9	1			T16	1		T250	1		T153	1