Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4314

1

T2

6

T4

8

T16

2

auto[1]

2036

1

T3

4

T4

4

T16

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	204	1			T70	2		T65	2		T23	2
auto[134217728:268435455]	218	1			T4	2		T39	2		T28	2
auto[268435456:402653183]	196	1			T39	2		T65	4		T51	2
auto[402653184:536870911]	190	1			T28	4		T65	2		T148	2
auto[536870912:671088639]	166	1			T23	4		T398	2		T66	4
auto[671088640:805306367]	180	1			T3	2		T65	2		T150	2
auto[805306368:939524095]	218	1			T17	2		T65	4		T212	2
auto[939524096:1073741823]	212	1			T16	2		T17	4		T39	2
auto[1073741824:1207959551]	212	1			T41	2		T151	2		T66	2
auto[1207959552:1342177279]	194	1			T4	2		T16	2		T41	2
auto[1342177280:1476395007]	216	1			T2	2		T39	2		T28	2
auto[1476395008:1610612735]	214	1			T28	2		T51	2		T113	4
auto[1610612736:1744830463]	220	1			T27	2		T65	2		T152	2
auto[1744830464:1879048191]	188	1			T38	2		T28	2		T65	2
auto[1879048192:2013265919]	202	1			T39	2		T147	2		T151	2
auto[2013265920:2147483647]	230	1			T38	2		T27	2		T19	2
auto[2147483648:2281701375]	196	1			T26	2		T147	2		T113	2
auto[2281701376:2415919103]	212	1			T41	2		T26	2		T145	2
auto[2415919104:2550136831]	182	1			T51	2		T66	4		T215	2
auto[2550136832:2684354559]	180	1			T4	2		T28	2		T51	2
auto[2684354560:2818572287]	236	1			T39	2		T145	2		T217	2
auto[2818572288:2952790015]	194	1			T17	2		T38	2		T39	2
auto[2952790016:3087007743]	202	1			T2	4		T39	2		T27	2
auto[3087007744:3221225471]	162	1			T38	2		T39	4		T70	2
auto[3221225472:3355443199]	208	1			T27	4		T50	2		T59	2
auto[3355443200:3489660927]	170	1			T3	2		T4	4		T17	2
auto[3489660928:3623878655]	198	1			T17	2		T39	2		T19	2
auto[3623878656:3758096383]	164	1			T145	2		T218	2		T66	2
auto[3758096384:3892314111]	206	1			T113	6		T6	2		T60	2
auto[3892314112:4026531839]	178	1			T26	2		T28	2		T65	2
auto[4026531840:4160749567]	200	1			T41	2		T26	2		T214	2
auto[4160749568:4294967295]	202	1			T4	2		T39	2		T50	6

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	126	1			T65	2		T23	2		T252	2
auto[0:134217727]	auto[1]	78	1			T70	2		T201	2		T71	2
auto[134217728:268435455]	auto[0]	160	1			T4	2		T39	2		T28	2
auto[134217728:268435455]	auto[1]	58	1			T40	2		T151	2		T66	2
auto[268435456:402653183]	auto[0]	126	1			T39	2		T65	2		T51	2
auto[268435456:402653183]	auto[1]	70	1			T65	2		T69	2		T76	2
auto[402653184:536870911]	auto[0]	136	1			T28	4		T51	2		T215	2
auto[402653184:536870911]	auto[1]	54	1			T65	2		T148	2		T210	2
auto[536870912:671088639]	auto[0]	110	1			T23	2		T66	4		T411	2
auto[536870912:671088639]	auto[1]	56	1			T23	2		T398	2		T71	2
auto[671088640:805306367]	auto[0]	122	1			T65	2		T150	2		T252	2
auto[671088640:805306367]	auto[1]	58	1			T3	2		T101	2		T80	2
auto[805306368:939524095]	auto[0]	156	1			T17	2		T65	4		T212	2
auto[805306368:939524095]	auto[1]	62	1			T113	2		T21	2		T273	2
auto[939524096:1073741823]	auto[0]	150	1			T16	2		T17	4		T51	4
auto[939524096:1073741823]	auto[1]	62	1			T39	2		T26	2		T65	4
auto[1073741824:1207959551]	auto[0]	126	1			T41	2		T66	2		T152	2
auto[1073741824:1207959551]	auto[1]	86	1			T151	2		T69	2		T48	2
auto[1207959552:1342177279]	auto[0]	148	1			T4	2		T41	2		T50	2
auto[1207959552:1342177279]	auto[1]	46	1			T16	2		T65	2		T71	2
auto[1342177280:1476395007]	auto[0]	146	1			T2	2		T39	2		T28	2
auto[1342177280:1476395007]	auto[1]	70	1			T19	2		T218	2		T69	2
auto[1476395008:1610612735]	auto[0]	158	1			T28	2		T51	2		T113	2
auto[1476395008:1610612735]	auto[1]	56	1			T113	2		T80	2		T20	2
auto[1610612736:1744830463]	auto[0]	152	1			T27	2		T152	2		T113	2
auto[1610612736:1744830463]	auto[1]	68	1			T65	2		T113	2		T71	2
auto[1744830464:1879048191]	auto[0]	130	1			T38	2		T28	2		T23	2
auto[1744830464:1879048191]	auto[1]	58	1			T65	2		T250	2		T231	2
auto[1879048192:2013265919]	auto[0]	134	1			T217	2		T66	2		T152	2
auto[1879048192:2013265919]	auto[1]	68	1			T39	2		T147	2		T151	2
auto[2013265920:2147483647]	auto[0]	148	1			T38	2		T27	2		T65	4
auto[2013265920:2147483647]	auto[1]	82	1			T19	2		T106	2		T60	2
auto[2147483648:2281701375]	auto[0]	152	1			T147	2		T113	2		T60	2
auto[2147483648:2281701375]	auto[1]	44	1			T26	2		T60	2		T69	2
auto[2281701376:2415919103]	auto[0]	150	1			T26	2		T23	4		T215	2
auto[2281701376:2415919103]	auto[1]	62	1			T41	2		T145	2		T71	2
auto[2415919104:2550136831]	auto[0]	122	1			T51	2		T66	2		T48	2
auto[2415919104:2550136831]	auto[1]	60	1			T66	2		T215	2		T80	2
auto[2550136832:2684354559]	auto[0]	114	1			T28	2		T23	2		T226	2
auto[2550136832:2684354559]	auto[1]	66	1			T4	2		T51	2		T66	2
auto[2684354560:2818572287]	auto[0]	164	1			T145	2		T217	2		T66	4
auto[2684354560:2818572287]	auto[1]	72	1			T39	2		T210	2		T115	2
auto[2818572288:2952790015]	auto[0]	124	1			T17	2		T65	6		T215	2
auto[2818572288:2952790015]	auto[1]	70	1			T38	2		T39	2		T65	2
auto[2952790016:3087007743]	auto[0]	144	1			T2	4		T39	2		T27	2
auto[2952790016:3087007743]	auto[1]	58	1			T214	2		T218	2		T113	2
auto[3087007744:3221225471]	auto[0]	102	1			T38	2		T39	4		T70	2
auto[3087007744:3221225471]	auto[1]	60	1			T40	2		T217	2		T66	2
auto[3221225472:3355443199]	auto[0]	126	1			T27	4		T210	2		T66	4
auto[3221225472:3355443199]	auto[1]	82	1			T50	2		T59	2		T106	2
auto[3355443200:3489660927]	auto[0]	108	1			T4	2		T28	2		T65	2
auto[3355443200:3489660927]	auto[1]	62	1			T3	2		T4	2		T17	2
auto[3489660928:3623878655]	auto[0]	116	1			T17	2		T39	2		T66	2
auto[3489660928:3623878655]	auto[1]	82	1			T19	2		T66	4		T67	2
auto[3623878656:3758096383]	auto[0]	124	1			T145	2		T66	2		T76	2
auto[3623878656:3758096383]	auto[1]	40	1			T218	2		T80	2		T252	2
auto[3758096384:3892314111]	auto[0]	150	1			T113	4		T6	2		T60	2
auto[3758096384:3892314111]	auto[1]	56	1			T113	2		T80	2		T250	2
auto[3892314112:4026531839]	auto[0]	132	1			T26	2		T28	2		T65	2
auto[3892314112:4026531839]	auto[1]	46	1			T151	2		T115	2		T71	2
auto[4026531840:4160749567]	auto[0]	128	1			T41	2		T26	2		T214	2
auto[4026531840:4160749567]	auto[1]	72	1			T71	4		T411	2		T258	2
auto[4160749568:4294967295]	auto[0]	130	1			T4	2		T50	4		T150	2
auto[4160749568:4294967295]	auto[1]	72	1			T39	2		T50	2		T147	2