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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1578 1 T3 2 T11 2 T12 1
auto[1] 1813 1 T1 1 T3 1 T4 2


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 100 1 T12 1 T23 1 T24 1
auto[134217728:268435455] 99 1 T24 3 T25 2 T98 1
auto[268435456:402653183] 104 1 T12 1 T15 1 T24 3
auto[402653184:536870911] 103 1 T23 1 T24 4 T25 3
auto[536870912:671088639] 114 1 T77 1 T68 1 T24 1
auto[671088640:805306367] 115 1 T14 1 T49 1 T24 1
auto[805306368:939524095] 95 1 T23 1 T24 2 T25 2
auto[939524096:1073741823] 95 1 T24 1 T38 1 T25 1
auto[1073741824:1207959551] 103 1 T1 1 T11 1 T23 1
auto[1207959552:1342177279] 106 1 T49 1 T24 2 T38 1
auto[1342177280:1476395007] 107 1 T68 1 T24 1 T25 1
auto[1476395008:1610612735] 106 1 T11 1 T68 1 T25 3
auto[1610612736:1744830463] 116 1 T14 1 T16 1 T68 1
auto[1744830464:1879048191] 94 1 T12 1 T68 1 T24 3
auto[1879048192:2013265919] 117 1 T47 1 T23 1 T24 3
auto[2013265920:2147483647] 104 1 T24 3 T25 1 T26 1
auto[2147483648:2281701375] 90 1 T47 1 T25 1 T64 1
auto[2281701376:2415919103] 109 1 T24 2 T25 2 T26 1
auto[2415919104:2550136831] 117 1 T3 1 T4 1 T15 1
auto[2550136832:2684354559] 106 1 T68 1 T24 1 T25 2
auto[2684354560:2818572287] 106 1 T49 2 T68 1 T25 3
auto[2818572288:2952790015] 124 1 T4 1 T24 2 T25 5
auto[2952790016:3087007743] 117 1 T3 1 T14 1 T24 2
auto[3087007744:3221225471] 94 1 T77 1 T24 1 T25 1
auto[3221225472:3355443199] 101 1 T24 2 T38 1 T25 2
auto[3355443200:3489660927] 108 1 T24 1 T25 5 T96 1
auto[3489660928:3623878655] 117 1 T3 1 T49 1 T29 1
auto[3623878656:3758096383] 106 1 T77 1 T24 2 T25 2
auto[3758096384:3892314111] 109 1 T24 1 T25 3 T64 1
auto[3892314112:4026531839] 105 1 T47 1 T25 2 T64 1
auto[4026531840:4160749567] 100 1 T24 1 T96 1 T180 1
auto[4160749568:4294967295] 104 1 T47 1 T24 1 T25 3


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 44 1 T12 1 T23 1 T25 1
auto[0:134217727] auto[1] 56 1 T24 1 T25 1 T223 1
auto[134217728:268435455] auto[0] 57 1 T24 1 T25 2 T5 2
auto[134217728:268435455] auto[1] 42 1 T24 2 T98 1 T104 1
auto[268435456:402653183] auto[0] 40 1 T15 1 T24 1 T26 1
auto[268435456:402653183] auto[1] 64 1 T12 1 T24 2 T25 1
auto[402653184:536870911] auto[0] 51 1 T23 1 T24 3 T96 1
auto[402653184:536870911] auto[1] 52 1 T24 1 T25 3 T99 1
auto[536870912:671088639] auto[0] 57 1 T68 1 T24 1 T38 2
auto[536870912:671088639] auto[1] 57 1 T77 1 T25 4 T78 1
auto[671088640:805306367] auto[0] 60 1 T24 1 T64 1 T79 1
auto[671088640:805306367] auto[1] 55 1 T14 1 T49 1 T38 1
auto[805306368:939524095] auto[0] 36 1 T24 1 T25 1 T64 1
auto[805306368:939524095] auto[1] 59 1 T23 1 T24 1 T25 1
auto[939524096:1073741823] auto[0] 44 1 T24 1 T38 1 T25 1
auto[939524096:1073741823] auto[1] 51 1 T5 1 T69 1 T71 1
auto[1073741824:1207959551] auto[0] 38 1 T11 1 T130 1 T99 1
auto[1073741824:1207959551] auto[1] 65 1 T1 1 T23 1 T24 1
auto[1207959552:1342177279] auto[0] 48 1 T49 1 T24 2 T5 1
auto[1207959552:1342177279] auto[1] 58 1 T38 1 T25 1 T96 1
auto[1342177280:1476395007] auto[0] 43 1 T24 1 T103 2 T5 2
auto[1342177280:1476395007] auto[1] 64 1 T68 1 T25 1 T64 1
auto[1476395008:1610612735] auto[0] 47 1 T11 1 T68 1 T25 2
auto[1476395008:1610612735] auto[1] 59 1 T25 1 T78 1 T104 1
auto[1610612736:1744830463] auto[0] 56 1 T14 1 T68 1 T24 1
auto[1610612736:1744830463] auto[1] 60 1 T16 1 T24 1 T25 1
auto[1744830464:1879048191] auto[0] 40 1 T24 2 T25 2 T20 1
auto[1744830464:1879048191] auto[1] 54 1 T12 1 T68 1 T24 1
auto[1879048192:2013265919] auto[0] 61 1 T25 1 T223 1 T132 1
auto[1879048192:2013265919] auto[1] 56 1 T47 1 T23 1 T24 3
auto[2013265920:2147483647] auto[0] 46 1 T24 2 T25 1 T26 1
auto[2013265920:2147483647] auto[1] 58 1 T24 1 T97 1 T20 1
auto[2147483648:2281701375] auto[0] 42 1 T99 1 T5 3 T104 1
auto[2147483648:2281701375] auto[1] 48 1 T47 1 T25 1 T64 1
auto[2281701376:2415919103] auto[0] 51 1 T24 1 T25 1 T69 1
auto[2281701376:2415919103] auto[1] 58 1 T24 1 T25 1 T26 1
auto[2415919104:2550136831] auto[0] 63 1 T3 1 T15 1 T5 2
auto[2415919104:2550136831] auto[1] 54 1 T4 1 T47 1 T49 1
auto[2550136832:2684354559] auto[0] 51 1 T68 1 T25 1 T39 1
auto[2550136832:2684354559] auto[1] 55 1 T24 1 T25 1 T64 1
auto[2684354560:2818572287] auto[0] 50 1 T49 2 T68 1 T25 2
auto[2684354560:2818572287] auto[1] 56 1 T25 1 T97 1 T104 3
auto[2818572288:2952790015] auto[0] 65 1 T24 1 T25 2 T127 1
auto[2818572288:2952790015] auto[1] 59 1 T4 1 T24 1 T25 3
auto[2952790016:3087007743] auto[0] 53 1 T24 2 T25 1 T179 1
auto[2952790016:3087007743] auto[1] 64 1 T3 1 T14 1 T5 1
auto[3087007744:3221225471] auto[0] 49 1 T77 1 T24 1 T25 1
auto[3087007744:3221225471] auto[1] 45 1 T69 1 T105 1 T238 1
auto[3221225472:3355443199] auto[0] 45 1 T24 1 T38 1 T25 1
auto[3221225472:3355443199] auto[1] 56 1 T24 1 T25 1 T130 1
auto[3355443200:3489660927] auto[0] 55 1 T25 3 T5 1 T69 1
auto[3355443200:3489660927] auto[1] 53 1 T24 1 T25 2 T96 1
auto[3489660928:3623878655] auto[0] 50 1 T3 1 T49 1 T39 1
auto[3489660928:3623878655] auto[1] 67 1 T29 1 T25 3 T64 1
auto[3623878656:3758096383] auto[0] 52 1 T25 1 T20 1 T5 2
auto[3623878656:3758096383] auto[1] 54 1 T77 1 T24 2 T25 1
auto[3758096384:3892314111] auto[0] 45 1 T25 3 T99 1 T207 1
auto[3758096384:3892314111] auto[1] 64 1 T24 1 T64 1 T5 1
auto[3892314112:4026531839] auto[0] 48 1 T39 1 T51 1 T188 1
auto[3892314112:4026531839] auto[1] 57 1 T47 1 T25 2 T64 1
auto[4026531840:4160749567] auto[0] 47 1 T96 1 T180 1 T223 1
auto[4026531840:4160749567] auto[1] 53 1 T24 1 T104 1 T132 2
auto[4160749568:4294967295] auto[0] 44 1 T25 1 T5 1 T70 1
auto[4160749568:4294967295] auto[1] 60 1 T47 1 T24 1 T25 2

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