Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4524

1

T4

2

T11

2

T12

6

auto[1]

2256

1

T1

2

T3

6

T4

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	240	1			T1	2		T24	2		T78	2
auto[134217728:268435455]	218	1			T77	2		T24	2		T25	4
auto[268435456:402653183]	204	1			T15	2		T49	2		T24	4
auto[402653184:536870911]	224	1			T68	2		T24	4		T38	2
auto[536870912:671088639]	230	1			T47	2		T24	6		T25	8
auto[671088640:805306367]	178	1			T47	2		T49	2		T24	2
auto[805306368:939524095]	210	1			T47	2		T24	6		T25	2
auto[939524096:1073741823]	230	1			T4	2		T68	2		T24	2
auto[1073741824:1207959551]	176	1			T11	2		T49	2		T24	4
auto[1207959552:1342177279]	226	1			T11	2		T24	6		T25	4
auto[1342177280:1476395007]	202	1			T68	2		T23	2		T25	2
auto[1476395008:1610612735]	206	1			T29	2		T25	2		T100	2
auto[1610612736:1744830463]	228	1			T3	2		T24	2		T25	2
auto[1744830464:1879048191]	206	1			T24	4		T25	4		T64	2
auto[1879048192:2013265919]	270	1			T23	2		T24	6		T38	2
auto[2013265920:2147483647]	232	1			T49	2		T25	6		T130	2
auto[2147483648:2281701375]	194	1			T12	2		T15	2		T77	2
auto[2281701376:2415919103]	220	1			T68	2		T24	4		T179	2
auto[2415919104:2550136831]	214	1			T4	2		T25	6		T98	2
auto[2550136832:2684354559]	218	1			T12	2		T24	6		T25	8
auto[2684354560:2818572287]	196	1			T24	2		T25	4		T97	2
auto[2818572288:2952790015]	230	1			T16	2		T25	4		T179	2
auto[2952790016:3087007743]	210	1			T12	2		T23	2		T24	2
auto[3087007744:3221225471]	196	1			T3	2		T14	2		T47	2
auto[3221225472:3355443199]	202	1			T14	2		T24	2		T38	2
auto[3355443200:3489660927]	210	1			T77	2		T68	2		T24	4
auto[3489660928:3623878655]	200	1			T23	2		T24	4		T25	4
auto[3623878656:3758096383]	218	1			T47	2		T24	4		T25	6
auto[3758096384:3892314111]	208	1			T14	2		T49	2		T23	2
auto[3892314112:4026531839]	210	1			T24	6		T25	6		T130	2
auto[4026531840:4160749567]	204	1			T68	2		T24	4		T25	4
auto[4160749568:4294967295]	170	1			T3	2		T24	2		T25	4

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	162	1			T99	2		T5	2		T69	2
auto[0:134217727]	auto[1]	78	1			T1	2		T24	2		T78	2
auto[134217728:268435455]	auto[0]	144	1			T77	2		T24	2		T25	4
auto[134217728:268435455]	auto[1]	74	1			T96	2		T20	2		T83	4
auto[268435456:402653183]	auto[0]	132	1			T15	2		T24	2		T38	2
auto[268435456:402653183]	auto[1]	72	1			T49	2		T24	2		T38	2
auto[402653184:536870911]	auto[0]	150	1			T68	2		T25	6		T39	2
auto[402653184:536870911]	auto[1]	74	1			T24	4		T38	2		T95	2
auto[536870912:671088639]	auto[0]	166	1			T47	2		T24	6		T25	6
auto[536870912:671088639]	auto[1]	64	1			T25	2		T50	2		T223	2
auto[671088640:805306367]	auto[0]	102	1			T47	2		T49	2		T24	2
auto[671088640:805306367]	auto[1]	76	1			T25	2		T187	2		T241	2
auto[805306368:939524095]	auto[0]	134	1			T24	6		T25	2		T26	2
auto[805306368:939524095]	auto[1]	76	1			T47	2		T78	2		T79	2
auto[939524096:1073741823]	auto[0]	170	1			T68	2		T24	2		T96	6
auto[939524096:1073741823]	auto[1]	60	1			T4	2		T25	2		T79	2
auto[1073741824:1207959551]	auto[0]	118	1			T49	2		T24	4		T25	6
auto[1073741824:1207959551]	auto[1]	58	1			T11	2		T130	2		T97	2
auto[1207959552:1342177279]	auto[0]	152	1			T11	2		T24	6		T25	4
auto[1207959552:1342177279]	auto[1]	74	1			T130	2		T69	4		T132	6
auto[1342177280:1476395007]	auto[0]	126	1			T68	2		T25	2		T96	2
auto[1342177280:1476395007]	auto[1]	76	1			T23	2		T70	2		T74	2
auto[1476395008:1610612735]	auto[0]	128	1			T100	2		T103	2		T69	2
auto[1476395008:1610612735]	auto[1]	78	1			T29	2		T25	2		T70	2
auto[1610612736:1744830463]	auto[0]	154	1			T24	2		T25	2		T5	2
auto[1610612736:1744830463]	auto[1]	74	1			T3	2		T69	2		T273	2
auto[1744830464:1879048191]	auto[0]	146	1			T24	2		T25	4		T64	2
auto[1744830464:1879048191]	auto[1]	60	1			T24	2		T103	2		T5	4
auto[1879048192:2013265919]	auto[0]	178	1			T24	4		T38	2		T25	2
auto[1879048192:2013265919]	auto[1]	92	1			T23	2		T24	2		T25	2
auto[2013265920:2147483647]	auto[0]	162	1			T49	2		T25	4		T20	4
auto[2013265920:2147483647]	auto[1]	70	1			T25	2		T130	2		T69	2
auto[2147483648:2281701375]	auto[0]	114	1			T12	2		T77	2		T49	2
auto[2147483648:2281701375]	auto[1]	80	1			T15	2		T25	2		T95	2
auto[2281701376:2415919103]	auto[0]	144	1			T68	2		T24	2		T179	2
auto[2281701376:2415919103]	auto[1]	76	1			T24	2		T103	2		T21	2
auto[2415919104:2550136831]	auto[0]	154	1			T4	2		T25	6		T99	2
auto[2415919104:2550136831]	auto[1]	60	1			T98	2		T5	2		T106	2
auto[2550136832:2684354559]	auto[0]	162	1			T12	2		T24	4		T25	8
auto[2550136832:2684354559]	auto[1]	56	1			T24	2		T78	2		T213	2
auto[2684354560:2818572287]	auto[0]	132	1			T24	2		T25	4		T97	2
auto[2684354560:2818572287]	auto[1]	64	1			T79	2		T83	4		T6	2
auto[2818572288:2952790015]	auto[0]	168	1			T25	2		T64	2		T39	2
auto[2818572288:2952790015]	auto[1]	62	1			T16	2		T25	2		T179	2
auto[2952790016:3087007743]	auto[0]	138	1			T12	2		T23	2		T24	2
auto[2952790016:3087007743]	auto[1]	72	1			T104	2		T275	2		T259	2
auto[3087007744:3221225471]	auto[0]	148	1			T47	2		T24	2		T38	2
auto[3087007744:3221225471]	auto[1]	48	1			T3	2		T14	2		T68	2
auto[3221225472:3355443199]	auto[0]	134	1			T24	2		T38	2		T25	8
auto[3221225472:3355443199]	auto[1]	68	1			T14	2		T5	6		T188	2
auto[3355443200:3489660927]	auto[0]	126	1			T68	2		T24	2		T96	2
auto[3355443200:3489660927]	auto[1]	84	1			T77	2		T24	2		T25	4
auto[3489660928:3623878655]	auto[0]	130	1			T24	2		T25	4		T97	2
auto[3489660928:3623878655]	auto[1]	70	1			T23	2		T24	2		T180	2
auto[3623878656:3758096383]	auto[0]	138	1			T47	2		T24	4		T25	4
auto[3623878656:3758096383]	auto[1]	80	1			T25	2		T78	2		T223	2
auto[3758096384:3892314111]	auto[0]	128	1			T49	2		T23	2		T25	2
auto[3758096384:3892314111]	auto[1]	80	1			T14	2		T25	2		T99	2
auto[3892314112:4026531839]	auto[0]	142	1			T24	4		T25	6		T20	2
auto[3892314112:4026531839]	auto[1]	68	1			T24	2		T130	2		T64	2
auto[4026531840:4160749567]	auto[0]	130	1			T68	2		T24	2		T25	2
auto[4026531840:4160749567]	auto[1]	74	1			T24	2		T25	2		T64	2
auto[4160749568:4294967295]	auto[0]	112	1			T24	2		T25	4		T99	2
auto[4160749568:4294967295]	auto[1]	58	1			T3	2		T83	2		T252	2