Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4600

1

T4

8

T16

4

T18

2

auto[1]

2188

1

T1

2

T18

2

T42

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	194	1			T43	2		T62	2		T47	2
auto[134217728:268435455]	228	1			T4	2		T47	2		T25	2
auto[268435456:402653183]	220	1			T4	2		T16	2		T62	2
auto[402653184:536870911]	216	1			T42	4		T24	4		T73	2
auto[536870912:671088639]	244	1			T36	2		T74	2		T47	2
auto[671088640:805306367]	164	1			T18	2		T43	2		T62	2
auto[805306368:939524095]	196	1			T20	2		T105	2		T106	2
auto[939524096:1073741823]	230	1			T43	2		T93	2		T47	2
auto[1073741824:1207959551]	180	1			T18	2		T20	2		T70	2
auto[1207959552:1342177279]	214	1			T62	2		T47	2		T56	2
auto[1342177280:1476395007]	220	1			T62	2		T74	2		T70	4
auto[1476395008:1610612735]	194	1			T19	2		T70	6		T98	4
auto[1610612736:1744830463]	186	1			T1	2		T19	2		T93	2
auto[1744830464:1879048191]	190	1			T70	2		T56	6		T38	2
auto[1879048192:2013265919]	204	1			T56	2		T98	2		T26	2
auto[2013265920:2147483647]	226	1			T93	2		T70	2		T209	2
auto[2147483648:2281701375]	196	1			T43	4		T70	6		T56	2
auto[2281701376:2415919103]	236	1			T93	2		T25	2		T70	6
auto[2415919104:2550136831]	182	1			T43	2		T62	6		T47	2
auto[2550136832:2684354559]	230	1			T4	2		T93	2		T74	2
auto[2684354560:2818572287]	240	1			T16	2		T20	2		T73	6
auto[2818572288:2952790015]	214	1			T19	2		T70	2		T56	2
auto[2952790016:3087007743]	202	1			T43	2		T70	2		T63	2
auto[3087007744:3221225471]	226	1			T19	2		T47	2		T25	2
auto[3221225472:3355443199]	234	1			T24	2		T70	2		T124	2
auto[3355443200:3489660927]	220	1			T70	4		T100	2		T104	4
auto[3489660928:3623878655]	212	1			T74	2		T25	2		T70	2
auto[3623878656:3758096383]	206	1			T70	2		T63	2		T98	4
auto[3758096384:3892314111]	212	1			T24	2		T73	2		T74	2
auto[3892314112:4026531839]	214	1			T93	2		T76	2		T104	2
auto[4026531840:4160749567]	228	1			T4	2		T70	2		T106	2
auto[4160749568:4294967295]	230	1			T43	2		T24	2		T62	4

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	122	1			T62	2		T231	2		T389	2
auto[0:134217727]	auto[1]	72	1			T43	2		T47	2		T71	2
auto[134217728:268435455]	auto[0]	156	1			T4	2		T47	2		T25	2
auto[134217728:268435455]	auto[1]	72	1			T70	4		T38	2		T204	2
auto[268435456:402653183]	auto[0]	156	1			T4	2		T16	2		T62	2
auto[268435456:402653183]	auto[1]	64	1			T195	2		T33	2		T420	2
auto[402653184:536870911]	auto[0]	140	1			T24	4		T73	2		T25	2
auto[402653184:536870911]	auto[1]	76	1			T42	4		T235	2		T236	2
auto[536870912:671088639]	auto[0]	174	1			T36	2		T74	2		T70	2
auto[536870912:671088639]	auto[1]	70	1			T47	2		T76	2		T70	8
auto[671088640:805306367]	auto[0]	124	1			T18	2		T43	2		T62	2
auto[671088640:805306367]	auto[1]	40	1			T70	2		T124	2		T128	2
auto[805306368:939524095]	auto[0]	138	1			T20	2		T203	2		T194	2
auto[805306368:939524095]	auto[1]	58	1			T105	2		T106	2		T26	2
auto[939524096:1073741823]	auto[0]	146	1			T93	2		T47	2		T70	4
auto[939524096:1073741823]	auto[1]	84	1			T43	2		T140	2		T77	2
auto[1073741824:1207959551]	auto[0]	120	1			T20	2		T48	2		T122	2
auto[1073741824:1207959551]	auto[1]	60	1			T18	2		T70	2		T56	2
auto[1207959552:1342177279]	auto[0]	138	1			T62	2		T47	2		T48	4
auto[1207959552:1342177279]	auto[1]	76	1			T56	2		T87	4		T128	2
auto[1342177280:1476395007]	auto[0]	166	1			T74	2		T70	2		T56	4
auto[1342177280:1476395007]	auto[1]	54	1			T62	2		T70	2		T28	2
auto[1476395008:1610612735]	auto[0]	136	1			T19	2		T70	2		T98	4
auto[1476395008:1610612735]	auto[1]	58	1			T70	4		T48	2		T131	2
auto[1610612736:1744830463]	auto[0]	120	1			T19	2		T93	2		T74	2
auto[1610612736:1744830463]	auto[1]	66	1			T1	2		T121	2		T108	4
auto[1744830464:1879048191]	auto[0]	120	1			T56	4		T38	2		T106	2
auto[1744830464:1879048191]	auto[1]	70	1			T70	2		T56	2		T28	2
auto[1879048192:2013265919]	auto[0]	130	1			T98	2		T26	2		T125	2
auto[1879048192:2013265919]	auto[1]	74	1			T56	2		T202	2		T236	2
auto[2013265920:2147483647]	auto[0]	154	1			T93	2		T209	2		T26	2
auto[2013265920:2147483647]	auto[1]	72	1			T70	2		T203	2		T108	2
auto[2147483648:2281701375]	auto[0]	134	1			T43	2		T70	4		T56	2
auto[2147483648:2281701375]	auto[1]	62	1			T43	2		T70	2		T238	2
auto[2281701376:2415919103]	auto[0]	146	1			T93	2		T25	2		T70	4
auto[2281701376:2415919103]	auto[1]	90	1			T70	2		T38	2		T71	2
auto[2415919104:2550136831]	auto[0]	130	1			T43	2		T62	4		T47	2
auto[2415919104:2550136831]	auto[1]	52	1			T62	2		T102	2		T122	2
auto[2550136832:2684354559]	auto[0]	164	1			T4	2		T47	2		T57	2
auto[2550136832:2684354559]	auto[1]	66	1			T93	2		T74	2		T106	2
auto[2684354560:2818572287]	auto[0]	162	1			T16	2		T20	2		T73	6
auto[2684354560:2818572287]	auto[1]	78	1			T102	2		T204	2		T69	2
auto[2818572288:2952790015]	auto[0]	142	1			T19	2		T70	2		T56	2
auto[2818572288:2952790015]	auto[1]	72	1			T67	2		T69	2		T108	2
auto[2952790016:3087007743]	auto[0]	134	1			T70	2		T63	2		T56	2
auto[2952790016:3087007743]	auto[1]	68	1			T43	2		T56	2		T231	2
auto[3087007744:3221225471]	auto[0]	146	1			T19	2		T47	2		T25	2
auto[3087007744:3221225471]	auto[1]	80	1			T236	2		T128	2		T7	2
auto[3221225472:3355443199]	auto[0]	148	1			T24	2		T107	2		T202	2
auto[3221225472:3355443199]	auto[1]	86	1			T70	2		T124	2		T102	2
auto[3355443200:3489660927]	auto[0]	154	1			T70	4		T100	2		T104	4
auto[3355443200:3489660927]	auto[1]	66	1			T108	4		T128	2		T89	2
auto[3489660928:3623878655]	auto[0]	142	1			T70	2		T104	2		T121	2
auto[3489660928:3623878655]	auto[1]	70	1			T74	2		T25	2		T56	2
auto[3623878656:3758096383]	auto[0]	150	1			T63	2		T98	4		T149	2
auto[3623878656:3758096383]	auto[1]	56	1			T70	2		T104	2		T231	2
auto[3758096384:3892314111]	auto[0]	146	1			T73	2		T74	2		T21	2
auto[3758096384:3892314111]	auto[1]	66	1			T24	2		T70	2		T69	2
auto[3892314112:4026531839]	auto[0]	148	1			T104	2		T209	2		T122	2
auto[3892314112:4026531839]	auto[1]	66	1			T93	2		T76	2		T125	2
auto[4026531840:4160749567]	auto[0]	156	1			T4	2		T70	2		T106	2
auto[4026531840:4160749567]	auto[1]	72	1			T131	2		T88	2		T233	2
auto[4160749568:4294967295]	auto[0]	158	1			T43	2		T24	2		T62	2
auto[4160749568:4294967295]	auto[1]	72	1			T62	2		T57	2		T87	4