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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4806 1 T14 12 T15 18 T16 14
auto[1] 2196 1 T5 2 T15 2 T16 2


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 224 1 T15 4 T19 2 T158 2
auto[134217728:268435455] 188 1 T14 2 T65 2 T52 2
auto[268435456:402653183] 232 1 T44 2 T70 2 T48 2
auto[402653184:536870911] 244 1 T19 2 T77 2 T52 2
auto[536870912:671088639] 208 1 T14 2 T77 2 T70 4
auto[671088640:805306367] 200 1 T16 2 T65 2 T70 2
auto[805306368:939524095] 214 1 T18 2 T69 2 T74 2
auto[939524096:1073741823] 264 1 T34 2 T82 2 T83 2
auto[1073741824:1207959551] 230 1 T83 2 T70 2 T48 2
auto[1207959552:1342177279] 232 1 T17 2 T83 2 T69 2
auto[1342177280:1476395007] 202 1 T16 2 T138 2 T70 2
auto[1476395008:1610612735] 224 1 T16 2 T130 2 T280 4
auto[1610612736:1744830463] 230 1 T5 2 T158 2 T20 2
auto[1744830464:1879048191] 182 1 T14 2 T138 2 T60 2
auto[1879048192:2013265919] 236 1 T77 2 T51 2 T105 2
auto[2013265920:2147483647] 194 1 T72 2 T102 2 T48 2
auto[2147483648:2281701375] 214 1 T20 2 T214 2 T66 2
auto[2281701376:2415919103] 248 1 T66 2 T75 2 T77 2
auto[2415919104:2550136831] 248 1 T15 2 T18 2 T44 2
auto[2550136832:2684354559] 214 1 T16 2 T34 2 T20 2
auto[2684354560:2818572287] 216 1 T14 2 T65 2 T60 2
auto[2818572288:2952790015] 212 1 T14 4 T82 2 T30 2
auto[2952790016:3087007743] 210 1 T18 2 T69 2 T30 2
auto[3087007744:3221225471] 186 1 T15 4 T16 2 T75 2
auto[3221225472:3355443199] 228 1 T17 2 T69 2 T20 2
auto[3355443200:3489660927] 190 1 T82 2 T69 2 T60 2
auto[3489660928:3623878655] 238 1 T20 2 T214 2 T65 4
auto[3623878656:3758096383] 260 1 T15 2 T82 2 T83 2
auto[3758096384:3892314111] 212 1 T15 2 T16 4 T65 2
auto[3892314112:4026531839] 198 1 T15 4 T82 2 T20 2
auto[4026531840:4160749567] 230 1 T16 2 T18 2 T44 2
auto[4160749568:4294967295] 194 1 T15 2 T19 2 T138 2


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 158 1 T15 4 T138 2 T83 2
auto[0:134217727] auto[1] 66 1 T19 2 T158 2 T157 2
auto[134217728:268435455] auto[0] 130 1 T14 2 T52 2 T218 2
auto[134217728:268435455] auto[1] 58 1 T65 2 T137 2 T250 2
auto[268435456:402653183] auto[0] 162 1 T44 2 T48 2 T6 2
auto[268435456:402653183] auto[1] 70 1 T70 2 T217 2 T219 2
auto[402653184:536870911] auto[0] 156 1 T6 4 T137 2 T218 2
auto[402653184:536870911] auto[1] 88 1 T19 2 T77 2 T52 2
auto[536870912:671088639] auto[0] 154 1 T14 2 T70 4 T6 6
auto[536870912:671088639] auto[1] 54 1 T77 2 T316 2 T292 2
auto[671088640:805306367] auto[0] 130 1 T16 2 T65 2 T37 2
auto[671088640:805306367] auto[1] 70 1 T70 2 T51 2 T6 4
auto[805306368:939524095] auto[0] 130 1 T69 2 T66 2 T37 2
auto[805306368:939524095] auto[1] 84 1 T18 2 T74 2 T280 2
auto[939524096:1073741823] auto[0] 192 1 T34 2 T82 2 T83 2
auto[939524096:1073741823] auto[1] 72 1 T44 2 T21 2 T216 2
auto[1073741824:1207959551] auto[0] 150 1 T83 2 T6 2 T78 2
auto[1073741824:1207959551] auto[1] 80 1 T70 2 T48 2 T132 2
auto[1207959552:1342177279] auto[0] 152 1 T83 2 T69 2 T103 2
auto[1207959552:1342177279] auto[1] 80 1 T17 2 T74 2 T25 2
auto[1342177280:1476395007] auto[0] 154 1 T16 2 T138 2 T6 2
auto[1342177280:1476395007] auto[1] 48 1 T70 2 T108 2 T92 2
auto[1476395008:1610612735] auto[0] 150 1 T16 2 T130 2 T122 2
auto[1476395008:1610612735] auto[1] 74 1 T280 4 T45 2 T321 2
auto[1610612736:1744830463] auto[0] 158 1 T20 2 T70 2 T130 2
auto[1610612736:1744830463] auto[1] 72 1 T5 2 T158 2 T70 2
auto[1744830464:1879048191] auto[0] 132 1 T14 2 T138 2 T51 2
auto[1744830464:1879048191] auto[1] 50 1 T60 2 T6 2 T31 2
auto[1879048192:2013265919] auto[0] 164 1 T51 2 T105 2 T6 4
auto[1879048192:2013265919] auto[1] 72 1 T77 2 T280 2 T219 4
auto[2013265920:2147483647] auto[0] 134 1 T72 2 T48 2 T130 2
auto[2013265920:2147483647] auto[1] 60 1 T102 2 T217 2 T269 4
auto[2147483648:2281701375] auto[0] 146 1 T20 2 T77 2 T21 2
auto[2147483648:2281701375] auto[1] 68 1 T214 2 T66 2 T70 2
auto[2281701376:2415919103] auto[0] 178 1 T66 2 T75 2 T77 2
auto[2281701376:2415919103] auto[1] 70 1 T105 2 T307 2 T216 2
auto[2415919104:2550136831] auto[0] 178 1 T15 2 T44 2 T72 2
auto[2415919104:2550136831] auto[1] 70 1 T18 2 T66 2 T304 2
auto[2550136832:2684354559] auto[0] 146 1 T16 2 T20 2 T70 2
auto[2550136832:2684354559] auto[1] 68 1 T34 2 T214 2 T280 2
auto[2684354560:2818572287] auto[0] 162 1 T14 2 T65 2 T77 2
auto[2684354560:2818572287] auto[1] 54 1 T60 2 T6 4 T215 2
auto[2818572288:2952790015] auto[0] 170 1 T14 4 T82 2 T30 2
auto[2818572288:2952790015] auto[1] 42 1 T70 2 T90 2 T271 2
auto[2952790016:3087007743] auto[0] 138 1 T69 2 T66 2 T70 2
auto[2952790016:3087007743] auto[1] 72 1 T18 2 T30 2 T65 2
auto[3087007744:3221225471] auto[0] 108 1 T15 4 T75 2 T48 2
auto[3087007744:3221225471] auto[1] 78 1 T16 2 T130 2 T6 2
auto[3221225472:3355443199] auto[0] 124 1 T69 2 T20 2 T30 2
auto[3221225472:3355443199] auto[1] 104 1 T17 2 T6 4 T108 2
auto[3355443200:3489660927] auto[0] 128 1 T69 2 T157 2 T52 2
auto[3355443200:3489660927] auto[1] 62 1 T82 2 T60 2 T131 2
auto[3489660928:3623878655] auto[0] 162 1 T20 2 T65 4 T75 2
auto[3489660928:3623878655] auto[1] 76 1 T214 2 T66 2 T60 2
auto[3623878656:3758096383] auto[0] 188 1 T15 2 T82 2 T83 2
auto[3623878656:3758096383] auto[1] 72 1 T6 2 T339 2 T90 2
auto[3758096384:3892314111] auto[0] 152 1 T15 2 T16 4 T65 2
auto[3758096384:3892314111] auto[1] 60 1 T70 2 T307 2 T270 2
auto[3892314112:4026531839] auto[0] 140 1 T15 4 T82 2 T20 2
auto[3892314112:4026531839] auto[1] 58 1 T105 2 T339 2 T90 2
auto[4026531840:4160749567] auto[0] 148 1 T16 2 T44 2 T65 2
auto[4026531840:4160749567] auto[1] 82 1 T18 2 T74 2 T77 2
auto[4160749568:4294967295] auto[0] 132 1 T19 2 T83 2 T48 2
auto[4160749568:4294967295] auto[1] 62 1 T15 2 T138 2 T6 2

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