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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1676 1 T14 1 T15 9 T16 5
auto[1] 1826 1 T14 5 T5 1 T15 1


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 119 1 T16 1 T20 1 T65 1
auto[134217728:268435455] 123 1 T15 1 T34 1 T158 1
auto[268435456:402653183] 122 1 T15 2 T18 1 T65 2
auto[402653184:536870911] 115 1 T14 1 T5 1 T20 1
auto[536870912:671088639] 103 1 T70 1 T137 1 T218 1
auto[671088640:805306367] 102 1 T15 1 T66 1 T60 1
auto[805306368:939524095] 104 1 T14 1 T83 1 T69 1
auto[939524096:1073741823] 119 1 T82 2 T65 1 T60 1
auto[1073741824:1207959551] 101 1 T65 1 T70 2 T105 1
auto[1207959552:1342177279] 108 1 T77 1 T70 2 T6 1
auto[1342177280:1476395007] 107 1 T17 1 T66 1 T37 1
auto[1476395008:1610612735] 104 1 T34 1 T214 1 T74 1
auto[1610612736:1744830463] 107 1 T14 2 T20 1 T6 3
auto[1744830464:1879048191] 102 1 T16 1 T69 1 T72 1
auto[1879048192:2013265919] 100 1 T18 1 T60 1 T21 1
auto[2013265920:2147483647] 110 1 T83 1 T74 1 T105 1
auto[2147483648:2281701375] 117 1 T66 1 T130 1 T6 2
auto[2281701376:2415919103] 108 1 T16 1 T18 1 T19 1
auto[2415919104:2550136831] 118 1 T15 1 T44 2 T74 1
auto[2550136832:2684354559] 112 1 T19 1 T82 1 T83 2
auto[2684354560:2818572287] 114 1 T15 1 T30 1 T48 1
auto[2818572288:2952790015] 103 1 T16 1 T138 1 T83 1
auto[2952790016:3087007743] 134 1 T14 1 T16 1 T66 1
auto[3087007744:3221225471] 104 1 T17 1 T82 1 T48 1
auto[3221225472:3355443199] 88 1 T157 1 T6 1 T78 1
auto[3355443200:3489660927] 97 1 T16 1 T138 1 T20 1
auto[3489660928:3623878655] 110 1 T18 1 T19 1 T83 1
auto[3623878656:3758096383] 113 1 T15 1 T20 1 T65 1
auto[3758096384:3892314111] 108 1 T14 1 T16 1 T20 1
auto[3892314112:4026531839] 93 1 T15 1 T69 1 T65 1
auto[4026531840:4160749567] 133 1 T15 2 T16 1 T69 1
auto[4160749568:4294967295] 104 1 T20 1 T70 1 T280 1


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 55 1 T16 1 T6 1 T339 1
auto[0:134217727] auto[1] 64 1 T20 1 T65 1 T75 1
auto[134217728:268435455] auto[0] 58 1 T15 1 T34 1 T65 1
auto[134217728:268435455] auto[1] 65 1 T158 1 T44 1 T217 1
auto[268435456:402653183] auto[0] 53 1 T15 2 T65 2 T130 1
auto[268435456:402653183] auto[1] 69 1 T18 1 T70 1 T52 1
auto[402653184:536870911] auto[0] 58 1 T20 1 T214 1 T106 1
auto[402653184:536870911] auto[1] 57 1 T14 1 T5 1 T30 1
auto[536870912:671088639] auto[0] 56 1 T137 1 T218 1 T90 2
auto[536870912:671088639] auto[1] 47 1 T70 1 T255 1 T92 1
auto[671088640:805306367] auto[0] 58 1 T15 1 T66 1 T60 1
auto[671088640:805306367] auto[1] 44 1 T70 1 T25 1 T280 1
auto[805306368:939524095] auto[0] 56 1 T14 1 T83 1 T70 1
auto[805306368:939524095] auto[1] 48 1 T69 1 T6 1 T292 1
auto[939524096:1073741823] auto[0] 52 1 T37 1 T217 1 T250 1
auto[939524096:1073741823] auto[1] 67 1 T82 2 T65 1 T60 1
auto[1073741824:1207959551] auto[0] 54 1 T6 1 T307 1 T255 1
auto[1073741824:1207959551] auto[1] 47 1 T65 1 T70 2 T105 1
auto[1207959552:1342177279] auto[0] 51 1 T70 2 T6 1 T280 1
auto[1207959552:1342177279] auto[1] 57 1 T77 1 T122 1 T215 1
auto[1342177280:1476395007] auto[0] 62 1 T17 1 T37 1 T6 1
auto[1342177280:1476395007] auto[1] 45 1 T66 1 T6 1 T78 1
auto[1476395008:1610612735] auto[0] 51 1 T214 1 T131 1 T48 1
auto[1476395008:1610612735] auto[1] 53 1 T34 1 T74 1 T51 1
auto[1610612736:1744830463] auto[0] 54 1 T6 2 T307 1 T46 1
auto[1610612736:1744830463] auto[1] 53 1 T14 2 T20 1 T6 1
auto[1744830464:1879048191] auto[0] 51 1 T69 1 T52 1 T339 1
auto[1744830464:1879048191] auto[1] 51 1 T16 1 T72 1 T70 1
auto[1879048192:2013265919] auto[0] 51 1 T60 1 T21 1 T130 1
auto[1879048192:2013265919] auto[1] 49 1 T18 1 T51 1 T105 1
auto[2013265920:2147483647] auto[0] 49 1 T83 1 T105 1 T6 2
auto[2013265920:2147483647] auto[1] 61 1 T74 1 T6 1 T25 1
auto[2147483648:2281701375] auto[0] 50 1 T66 1 T130 1 T6 2
auto[2147483648:2281701375] auto[1] 67 1 T31 1 T274 1 T7 1
auto[2281701376:2415919103] auto[0] 54 1 T16 1 T158 1 T48 1
auto[2281701376:2415919103] auto[1] 54 1 T18 1 T19 1 T82 1
auto[2415919104:2550136831] auto[0] 52 1 T15 1 T44 1 T107 1
auto[2415919104:2550136831] auto[1] 66 1 T44 1 T74 1 T66 1
auto[2550136832:2684354559] auto[0] 50 1 T82 1 T83 1 T20 1
auto[2550136832:2684354559] auto[1] 62 1 T19 1 T83 1 T52 1
auto[2684354560:2818572287] auto[0] 57 1 T15 1 T30 1 T48 1
auto[2684354560:2818572287] auto[1] 57 1 T269 1 T90 2 T108 1
auto[2818572288:2952790015] auto[0] 48 1 T16 1 T21 1 T130 1
auto[2818572288:2952790015] auto[1] 55 1 T138 1 T83 1 T30 1
auto[2952790016:3087007743] auto[0] 59 1 T16 1 T51 1 T130 1
auto[2952790016:3087007743] auto[1] 75 1 T14 1 T66 1 T157 1
auto[3087007744:3221225471] auto[0] 47 1 T6 1 T280 1 T122 1
auto[3087007744:3221225471] auto[1] 57 1 T17 1 T82 1 T48 1
auto[3221225472:3355443199] auto[0] 42 1 T6 1 T78 1 T68 1
auto[3221225472:3355443199] auto[1] 46 1 T157 1 T304 1 T216 1
auto[3355443200:3489660927] auto[0] 49 1 T20 1 T65 1 T6 1
auto[3355443200:3489660927] auto[1] 48 1 T16 1 T138 1 T103 1
auto[3489660928:3623878655] auto[0] 45 1 T37 1 T6 2 T218 1
auto[3489660928:3623878655] auto[1] 65 1 T18 1 T19 1 T83 1
auto[3623878656:3758096383] auto[0] 45 1 T15 1 T65 1 T70 1
auto[3623878656:3758096383] auto[1] 68 1 T20 1 T77 1 T215 1
auto[3758096384:3892314111] auto[0] 48 1 T16 1 T20 1 T6 3
auto[3758096384:3892314111] auto[1] 60 1 T14 1 T72 1 T51 1
auto[3892314112:4026531839] auto[0] 45 1 T15 1 T434 1 T112 1
auto[3892314112:4026531839] auto[1] 48 1 T69 1 T65 1 T265 1
auto[4026531840:4160749567] auto[0] 65 1 T15 1 T60 1 T77 1
auto[4026531840:4160749567] auto[1] 68 1 T15 1 T16 1 T69 1
auto[4160749568:4294967295] auto[0] 51 1 T280 1 T215 1 T274 1
auto[4160749568:4294967295] auto[1] 53 1 T20 1 T70 1 T216 1

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