Unified Coverage Report :: Group Instance : attest_sw_binding_6

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

1696

1

T14

1

T15

10

T16

5

auto[1]

1805

1

T14

5

T5

1

T16

3

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	131	1			T65	3		T66	1		T130	1
auto[134217728:268435455]	112	1			T14	1		T69	1		T52	1
auto[268435456:402653183]	126	1			T17	1		T19	2		T44	1
auto[402653184:536870911]	114	1			T70	3		T105	1		T6	1
auto[536870912:671088639]	126	1			T19	1		T83	1		T69	1
auto[671088640:805306367]	110	1			T15	1		T16	1		T44	1
auto[805306368:939524095]	95	1			T18	1		T83	1		T74	2
auto[939524096:1073741823]	112	1			T16	1		T18	1		T138	1
auto[1073741824:1207959551]	94	1			T14	1		T70	1		T218	1
auto[1207959552:1342177279]	95	1			T138	1		T72	1		T66	1
auto[1342177280:1476395007]	99	1			T15	2		T20	1		T60	1
auto[1476395008:1610612735]	91	1			T15	2		T158	1		T60	1
auto[1610612736:1744830463]	130	1			T16	1		T34	1		T20	1
auto[1744830464:1879048191]	102	1			T14	1		T82	1		T69	1
auto[1879048192:2013265919]	116	1			T16	1		T18	1		T69	1
auto[2013265920:2147483647]	113	1			T20	1		T103	1		T48	1
auto[2147483648:2281701375]	123	1			T65	1		T72	1		T77	1
auto[2281701376:2415919103]	96	1			T5	1		T158	1		T65	1
auto[2415919104:2550136831]	102	1			T138	1		T77	1		T70	1
auto[2550136832:2684354559]	114	1			T17	1		T82	1		T83	1
auto[2684354560:2818572287]	107	1			T16	1		T66	1		T21	1
auto[2818572288:2952790015]	109	1			T83	2		T65	1		T66	1
auto[2952790016:3087007743]	122	1			T77	1		T130	1		T52	1
auto[3087007744:3221225471]	110	1			T15	1		T16	1		T6	3
auto[3221225472:3355443199]	113	1			T16	1		T6	3		T217	1
auto[3355443200:3489660927]	108	1			T14	1		T15	2		T30	1
auto[3489660928:3623878655]	124	1			T14	1		T15	1		T30	1
auto[3623878656:3758096383]	107	1			T14	1		T70	1		T48	1
auto[3758096384:3892314111]	108	1			T34	1		T20	1		T77	1
auto[3892314112:4026531839]	106	1			T15	1		T82	1		T138	1
auto[4026531840:4160749567]	100	1			T82	1		T65	1		T70	1
auto[4160749568:4294967295]	86	1			T16	1		T18	1		T82	1

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	70	1			T65	1		T130	1		T280	1
auto[0:134217727]	auto[1]	61	1			T65	2		T66	1		T6	1
auto[134217728:268435455]	auto[0]	52	1			T69	1		T52	1		T6	1
auto[134217728:268435455]	auto[1]	60	1			T14	1		T265	1		T339	1
auto[268435456:402653183]	auto[0]	49	1			T66	1		T90	1		T436	1
auto[268435456:402653183]	auto[1]	77	1			T17	1		T19	2		T44	1
auto[402653184:536870911]	auto[0]	62	1			T70	2		T105	1		T78	1
auto[402653184:536870911]	auto[1]	52	1			T70	1		T6	1		T217	1
auto[536870912:671088639]	auto[0]	67	1			T70	1		T130	1		T6	2
auto[536870912:671088639]	auto[1]	59	1			T19	1		T83	1		T69	1
auto[671088640:805306367]	auto[0]	54	1			T15	1		T44	1		T157	1
auto[671088640:805306367]	auto[1]	56	1			T16	1		T65	1		T78	1
auto[805306368:939524095]	auto[0]	46	1			T255	1		T208	1		T314	1
auto[805306368:939524095]	auto[1]	49	1			T18	1		T83	1		T74	2
auto[939524096:1073741823]	auto[0]	48	1			T16	1		T78	1		T219	1
auto[939524096:1073741823]	auto[1]	64	1			T18	1		T138	1		T83	1
auto[1073741824:1207959551]	auto[0]	36	1			T46	1		T108	1		T436	1
auto[1073741824:1207959551]	auto[1]	58	1			T14	1		T70	1		T218	1
auto[1207959552:1342177279]	auto[0]	41	1			T137	1		T109	1		T314	1
auto[1207959552:1342177279]	auto[1]	54	1			T138	1		T72	1		T66	1
auto[1342177280:1476395007]	auto[0]	44	1			T15	2		T130	1		T6	1
auto[1342177280:1476395007]	auto[1]	55	1			T20	1		T60	1		T157	1
auto[1476395008:1610612735]	auto[0]	53	1			T15	2		T158	1		T77	2
auto[1476395008:1610612735]	auto[1]	38	1			T60	1		T70	1		T51	1
auto[1610612736:1744830463]	auto[0]	72	1			T214	1		T60	1		T70	1
auto[1610612736:1744830463]	auto[1]	58	1			T16	1		T34	1		T20	1
auto[1744830464:1879048191]	auto[0]	45	1			T74	1		T66	1		T75	1
auto[1744830464:1879048191]	auto[1]	57	1			T14	1		T82	1		T69	1
auto[1879048192:2013265919]	auto[0]	48	1			T16	1		T131	1		T37	1
auto[1879048192:2013265919]	auto[1]	68	1			T18	1		T69	1		T72	1
auto[2013265920:2147483647]	auto[0]	53	1			T20	1		T48	1		T37	1
auto[2013265920:2147483647]	auto[1]	60	1			T103	1		T220	1		T56	1
auto[2147483648:2281701375]	auto[0]	52	1			T65	1		T21	1		T48	1
auto[2147483648:2281701375]	auto[1]	71	1			T72	1		T77	1		T378	2
auto[2281701376:2415919103]	auto[0]	46	1			T65	1		T78	1		T106	1
auto[2281701376:2415919103]	auto[1]	50	1			T5	1		T158	1		T70	1
auto[2415919104:2550136831]	auto[0]	50	1			T77	1		T70	1		T6	1
auto[2415919104:2550136831]	auto[1]	52	1			T138	1		T215	1		T108	1
auto[2550136832:2684354559]	auto[0]	62	1			T17	1		T83	1		T20	1
auto[2550136832:2684354559]	auto[1]	52	1			T82	1		T214	1		T70	1
auto[2684354560:2818572287]	auto[0]	56	1			T16	1		T21	1		T48	1
auto[2684354560:2818572287]	auto[1]	51	1			T66	1		T217	2		T78	1
auto[2818572288:2952790015]	auto[0]	49	1			T83	2		T60	1		T137	1
auto[2818572288:2952790015]	auto[1]	60	1			T65	1		T66	1		T102	1
auto[2952790016:3087007743]	auto[0]	72	1			T130	1		T6	1		T250	1
auto[2952790016:3087007743]	auto[1]	50	1			T77	1		T52	1		T121	1
auto[3087007744:3221225471]	auto[0]	48	1			T15	1		T16	1		T6	1
auto[3087007744:3221225471]	auto[1]	62	1			T6	2		T280	1		T215	1
auto[3221225472:3355443199]	auto[0]	58	1			T16	1		T6	3		T217	1
auto[3221225472:3355443199]	auto[1]	55	1			T304	1		T25	1		T274	1
auto[3355443200:3489660927]	auto[0]	58	1			T15	2		T70	1		T130	1
auto[3355443200:3489660927]	auto[1]	50	1			T14	1		T30	1		T70	2
auto[3489660928:3623878655]	auto[0]	64	1			T14	1		T15	1		T30	1
auto[3489660928:3623878655]	auto[1]	60	1			T75	1		T70	1		T51	1
auto[3623878656:3758096383]	auto[0]	55	1			T48	1		T217	1		T307	1
auto[3623878656:3758096383]	auto[1]	52	1			T14	1		T70	1		T218	1
auto[3758096384:3892314111]	auto[0]	57	1			T20	1		T77	1		T106	1
auto[3758096384:3892314111]	auto[1]	51	1			T34	1		T378	1		T93	1
auto[3892314112:4026531839]	auto[0]	40	1			T15	1		T82	1		T219	1
auto[3892314112:4026531839]	auto[1]	66	1			T138	1		T20	2		T30	1
auto[4026531840:4160749567]	auto[0]	43	1			T70	1		T321	1		T108	1
auto[4026531840:4160749567]	auto[1]	57	1			T82	1		T65	1		T6	2
auto[4160749568:4294967295]	auto[0]	46	1			T214	1		T252	1		T212	1
auto[4160749568:4294967295]	auto[1]	40	1			T16	1		T18	1		T82	1