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Summary for Variable regwen_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for regwen_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 6841 1 T1 6 T5 5 T14 26
auto[1] 265 1 T79 2 T80 9 T116 1


Summary for Variable sw_input_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 32 0 32 100.00


Automatically Generated Bins for sw_input_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] 2827 1 T1 3 T14 7 T35 2
auto[134217728:268435455] 172 1 T5 1 T6 1 T228 1
auto[268435456:402653183] 158 1 T5 1 T14 2 T80 1
auto[402653184:536870911] 151 1 T14 1 T102 1 T25 2
auto[536870912:671088639] 145 1 T36 1 T24 1 T215 1
auto[671088640:805306367] 160 1 T1 1 T14 3 T6 1
auto[805306368:939524095] 134 1 T14 1 T36 1 T6 2
auto[939524096:1073741823] 124 1 T36 1 T218 1 T115 1
auto[1073741824:1207959551] 138 1 T6 1 T25 2 T80 1
auto[1207959552:1342177279] 150 1 T18 1 T19 1 T80 2
auto[1342177280:1476395007] 138 1 T18 1 T133 2 T80 3
auto[1476395008:1610612735] 129 1 T14 1 T228 1 T25 1
auto[1610612736:1744830463] 123 1 T14 2 T18 1 T36 1
auto[1744830464:1879048191] 140 1 T14 1 T79 2 T19 1
auto[1879048192:2013265919] 135 1 T37 2 T50 1 T71 1
auto[2013265920:2147483647] 125 1 T14 1 T19 1 T50 1
auto[2147483648:2281701375] 133 1 T35 1 T91 1 T79 1
auto[2281701376:2415919103] 113 1 T14 1 T6 2 T79 1
auto[2415919104:2550136831] 123 1 T1 1 T19 1 T25 1
auto[2550136832:2684354559] 129 1 T6 1 T80 1 T50 1
auto[2684354560:2818572287] 130 1 T5 1 T14 2 T6 2
auto[2818572288:2952790015] 119 1 T91 1 T50 1 T24 1
auto[2952790016:3087007743] 137 1 T6 1 T91 1 T80 1
auto[3087007744:3221225471] 137 1 T14 1 T91 1 T25 1
auto[3221225472:3355443199] 134 1 T6 1 T19 2 T80 1
auto[3355443200:3489660927] 134 1 T18 1 T19 1 T50 2
auto[3489660928:3623878655] 145 1 T1 1 T5 1 T36 2
auto[3623878656:3758096383] 156 1 T98 1 T220 1 T80 1
auto[3758096384:3892314111] 145 1 T14 2 T35 2 T6 1
auto[3892314112:4026531839] 128 1 T14 1 T124 1 T219 1
auto[4026531840:4160749567] 145 1 T5 1 T19 1 T80 1
auto[4160749568:4294967295] 149 1 T6 1 T19 2 T128 1


Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 64 0 64 100.00


Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins
sw_input_cpregwen_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0:134217727] auto[0] 2821 1 T1 3 T14 7 T35 2
auto[0:134217727] auto[1] 6 1 T411 1 T294 1 T444 1
auto[134217728:268435455] auto[0] 165 1 T5 1 T6 1 T228 1
auto[134217728:268435455] auto[1] 7 1 T383 1 T445 1 T425 1
auto[268435456:402653183] auto[0] 153 1 T5 1 T14 2 T80 1
auto[268435456:402653183] auto[1] 5 1 T322 1 T298 1 T429 1
auto[402653184:536870911] auto[0] 146 1 T14 1 T102 1 T25 2
auto[402653184:536870911] auto[1] 5 1 T389 1 T294 1 T444 1
auto[536870912:671088639] auto[0] 140 1 T36 1 T24 1 T215 1
auto[536870912:671088639] auto[1] 5 1 T107 1 T389 1 T413 1
auto[671088640:805306367] auto[0] 152 1 T1 1 T14 3 T6 1
auto[671088640:805306367] auto[1] 8 1 T79 1 T104 1 T107 1
auto[805306368:939524095] auto[0] 123 1 T14 1 T36 1 T6 2
auto[805306368:939524095] auto[1] 11 1 T107 1 T411 1 T446 1
auto[939524096:1073741823] auto[0] 117 1 T36 1 T218 1 T115 1
auto[939524096:1073741823] auto[1] 7 1 T389 1 T446 1 T371 1
auto[1073741824:1207959551] auto[0] 132 1 T6 1 T25 2 T124 1
auto[1073741824:1207959551] auto[1] 6 1 T80 1 T413 1 T401 1
auto[1207959552:1342177279] auto[0] 139 1 T18 1 T19 1 T80 1
auto[1207959552:1342177279] auto[1] 11 1 T80 1 T106 1 T107 1
auto[1342177280:1476395007] auto[0] 127 1 T18 1 T133 2 T80 1
auto[1342177280:1476395007] auto[1] 11 1 T80 2 T104 1 T106 1
auto[1476395008:1610612735] auto[0] 123 1 T14 1 T228 1 T25 1
auto[1476395008:1610612735] auto[1] 6 1 T80 1 T389 1 T383 1
auto[1610612736:1744830463] auto[0] 116 1 T14 2 T18 1 T36 1
auto[1610612736:1744830463] auto[1] 7 1 T411 1 T322 1 T294 1
auto[1744830464:1879048191] auto[0] 130 1 T14 1 T79 1 T19 1
auto[1744830464:1879048191] auto[1] 10 1 T79 1 T116 1 T104 1
auto[1879048192:2013265919] auto[0] 128 1 T37 2 T50 1 T71 1
auto[1879048192:2013265919] auto[1] 7 1 T411 1 T389 1 T297 1
auto[2013265920:2147483647] auto[0] 120 1 T14 1 T19 1 T50 1
auto[2013265920:2147483647] auto[1] 5 1 T411 1 T294 1 T383 1
auto[2147483648:2281701375] auto[0] 125 1 T35 1 T91 1 T79 1
auto[2147483648:2281701375] auto[1] 8 1 T107 1 T322 1 T383 1
auto[2281701376:2415919103] auto[0] 108 1 T14 1 T6 2 T79 1
auto[2281701376:2415919103] auto[1] 5 1 T104 1 T294 1 T298 2
auto[2415919104:2550136831] auto[0] 118 1 T1 1 T19 1 T25 1
auto[2415919104:2550136831] auto[1] 5 1 T294 1 T259 1 T371 1
auto[2550136832:2684354559] auto[0] 120 1 T6 1 T50 1 T24 1
auto[2550136832:2684354559] auto[1] 9 1 T80 1 T445 1 T297 1
auto[2684354560:2818572287] auto[0] 121 1 T5 1 T14 2 T6 2
auto[2684354560:2818572287] auto[1] 9 1 T106 1 T389 3 T294 1
auto[2818572288:2952790015] auto[0] 108 1 T91 1 T50 1 T24 1
auto[2818572288:2952790015] auto[1] 11 1 T107 1 T411 1 T425 1
auto[2952790016:3087007743] auto[0] 127 1 T6 1 T91 1 T80 1
auto[2952790016:3087007743] auto[1] 10 1 T107 1 T411 1 T446 1
auto[3087007744:3221225471] auto[0] 127 1 T14 1 T91 1 T25 1
auto[3087007744:3221225471] auto[1] 10 1 T80 1 T294 3 T445 1
auto[3221225472:3355443199] auto[0] 125 1 T6 1 T19 2 T7 1
auto[3221225472:3355443199] auto[1] 9 1 T80 1 T389 1 T294 1
auto[3355443200:3489660927] auto[0] 126 1 T18 1 T19 1 T50 2
auto[3355443200:3489660927] auto[1] 8 1 T322 1 T294 1 T446 1
auto[3489660928:3623878655] auto[0] 133 1 T1 1 T5 1 T36 2
auto[3489660928:3623878655] auto[1] 12 1 T107 1 T413 1 T445 1
auto[3623878656:3758096383] auto[0] 150 1 T98 1 T220 1 T80 1
auto[3623878656:3758096383] auto[1] 6 1 T107 1 T325 1 T447 1
auto[3758096384:3892314111] auto[0] 138 1 T14 2 T35 2 T6 1
auto[3758096384:3892314111] auto[1] 7 1 T106 1 T322 1 T295 1
auto[3892314112:4026531839] auto[0] 113 1 T14 1 T124 1 T219 1
auto[3892314112:4026531839] auto[1] 15 1 T104 1 T107 2 T411 1
auto[4026531840:4160749567] auto[0] 132 1 T5 1 T19 1 T24 1
auto[4026531840:4160749567] auto[1] 13 1 T80 1 T104 1 T383 2
auto[4160749568:4294967295] auto[0] 138 1 T6 1 T19 2 T128 1
auto[4160749568:4294967295] auto[1] 11 1 T106 1 T322 1 T294 1

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