Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4546

1

T5

8

T15

4

T16

6

auto[1]

2300

1

T4

4

T5

2

T16

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	198	1			T27	2		T52	2		T150	2
auto[134217728:268435455]	244	1			T38	4		T80	2		T52	2
auto[268435456:402653183]	236	1			T15	2		T16	2		T189	2
auto[402653184:536870911]	218	1			T5	2		T39	2		T20	4
auto[536870912:671088639]	224	1			T16	2		T72	2		T88	2
auto[671088640:805306367]	202	1			T6	2		T80	2		T27	2
auto[805306368:939524095]	212	1			T15	2		T219	2		T190	4
auto[939524096:1073741823]	192	1			T39	2		T19	2		T80	2
auto[1073741824:1207959551]	226	1			T5	4		T71	2		T190	2
auto[1207959552:1342177279]	210	1			T4	2		T5	2		T38	2
auto[1342177280:1476395007]	234	1			T188	2		T54	2		T126	2
auto[1476395008:1610612735]	240	1			T71	2		T19	2		T52	4
auto[1610612736:1744830463]	204	1			T20	2		T111	2		T53	2
auto[1744830464:1879048191]	186	1			T39	2		T72	2		T150	2
auto[1879048192:2013265919]	196	1			T54	2		T84	2		T86	2
auto[2013265920:2147483647]	186	1			T104	2		T188	2		T222	2
auto[2147483648:2281701375]	218	1			T4	2		T188	2		T83	2
auto[2281701376:2415919103]	204	1			T92	2		T150	2		T216	2
auto[2415919104:2550136831]	180	1			T71	2		T73	2		T190	2
auto[2550136832:2684354559]	200	1			T290	2		T78	2		T213	2
auto[2684354560:2818572287]	202	1			T27	2		T290	2		T55	2
auto[2818572288:2952790015]	256	1			T16	2		T38	2		T71	2
auto[2952790016:3087007743]	216	1			T82	2		T84	2		T209	2
auto[3087007744:3221225471]	250	1			T16	2		T18	4		T104	2
auto[3221225472:3355443199]	198	1			T150	2		T189	2		T77	2
auto[3355443200:3489660927]	238	1			T188	2		T54	2		T53	2
auto[3489660928:3623878655]	214	1			T71	2		T84	2		T29	2
auto[3623878656:3758096383]	210	1			T16	2		T18	2		T73	2
auto[3758096384:3892314111]	214	1			T5	2		T39	2		T20	2
auto[3892314112:4026531839]	210	1			T92	2		T83	2		T77	4
auto[4026531840:4160749567]	230	1			T6	2		T38	2		T80	2
auto[4160749568:4294967295]	198	1			T38	2		T39	2		T18	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	120	1			T27	2		T49	2		T79	2
auto[0:134217727]	auto[1]	78	1			T52	2		T150	2		T215	2
auto[134217728:268435455]	auto[0]	174	1			T38	4		T80	2		T52	2
auto[134217728:268435455]	auto[1]	70	1			T317	2		T286	2		T312	2
auto[268435456:402653183]	auto[0]	170	1			T15	2		T216	2		T290	2
auto[268435456:402653183]	auto[1]	66	1			T16	2		T189	2		T83	2
auto[402653184:536870911]	auto[0]	118	1			T5	2		T39	2		T20	2
auto[402653184:536870911]	auto[1]	100	1			T20	2		T82	2		T132	2
auto[536870912:671088639]	auto[0]	154	1			T111	2		T274	2		T214	2
auto[536870912:671088639]	auto[1]	70	1			T16	2		T72	2		T88	2
auto[671088640:805306367]	auto[0]	142	1			T111	2		T112	2		T81	2
auto[671088640:805306367]	auto[1]	60	1			T6	2		T80	2		T27	2
auto[805306368:939524095]	auto[0]	128	1			T15	2		T217	2		T138	2
auto[805306368:939524095]	auto[1]	84	1			T219	2		T190	4		T83	2
auto[939524096:1073741823]	auto[0]	136	1			T39	2		T80	2		T52	2
auto[939524096:1073741823]	auto[1]	56	1			T19	2		T189	2		T125	2
auto[1073741824:1207959551]	auto[0]	146	1			T5	4		T71	2		T190	2
auto[1073741824:1207959551]	auto[1]	80	1			T84	2		T88	2		T222	2
auto[1207959552:1342177279]	auto[0]	126	1			T5	2		T38	2		T73	2
auto[1207959552:1342177279]	auto[1]	84	1			T4	2		T150	2		T83	2
auto[1342177280:1476395007]	auto[0]	144	1			T188	2		T54	2		T426	2
auto[1342177280:1476395007]	auto[1]	90	1			T126	2		T113	2		T74	2
auto[1476395008:1610612735]	auto[0]	164	1			T71	2		T19	2		T52	4
auto[1476395008:1610612735]	auto[1]	76	1			T126	2		T7	2		T30	2
auto[1610612736:1744830463]	auto[0]	136	1			T20	2		T53	2		T217	2
auto[1610612736:1744830463]	auto[1]	68	1			T111	2		T35	2		T138	2
auto[1744830464:1879048191]	auto[0]	132	1			T39	2		T150	2		T82	2
auto[1744830464:1879048191]	auto[1]	54	1			T72	2		T131	2		T213	2
auto[1879048192:2013265919]	auto[0]	128	1			T54	2		T290	2		T78	2
auto[1879048192:2013265919]	auto[1]	68	1			T84	2		T86	2		T55	2
auto[2013265920:2147483647]	auto[0]	116	1			T104	2		T188	2		T266	2
auto[2013265920:2147483647]	auto[1]	70	1			T222	2		T8	2		T148	2
auto[2147483648:2281701375]	auto[0]	138	1			T188	2		T84	2		T53	2
auto[2147483648:2281701375]	auto[1]	80	1			T4	2		T83	2		T88	2
auto[2281701376:2415919103]	auto[0]	134	1			T92	2		T150	2		T216	2
auto[2281701376:2415919103]	auto[1]	70	1			T77	2		T402	2		T426	2
auto[2415919104:2550136831]	auto[0]	130	1			T71	2		T73	2		T190	2
auto[2415919104:2550136831]	auto[1]	50	1			T126	2		T8	2		T101	2
auto[2550136832:2684354559]	auto[0]	134	1			T290	2		T213	2		T214	4
auto[2550136832:2684354559]	auto[1]	66	1			T78	2		T141	2		T414	2
auto[2684354560:2818572287]	auto[0]	130	1			T27	2		T55	2		T74	2
auto[2684354560:2818572287]	auto[1]	72	1			T290	2		T29	2		T31	2
auto[2818572288:2952790015]	auto[0]	178	1			T16	2		T38	2		T54	2
auto[2818572288:2952790015]	auto[1]	78	1			T71	2		T112	2		T32	2
auto[2952790016:3087007743]	auto[0]	152	1			T84	2		T209	2		T112	2
auto[2952790016:3087007743]	auto[1]	64	1			T82	2		T126	2		T113	2
auto[3087007744:3221225471]	auto[0]	170	1			T16	2		T18	2		T104	2
auto[3087007744:3221225471]	auto[1]	80	1			T18	2		T92	2		T80	2
auto[3221225472:3355443199]	auto[0]	134	1			T150	2		T77	2		T55	2
auto[3221225472:3355443199]	auto[1]	64	1			T189	2		T55	2		T222	2
auto[3355443200:3489660927]	auto[0]	168	1			T188	2		T53	2		T290	4
auto[3355443200:3489660927]	auto[1]	70	1			T54	2		T74	4		T212	2
auto[3489660928:3623878655]	auto[0]	140	1			T71	2		T84	2		T29	2
auto[3489660928:3623878655]	auto[1]	74	1			T125	4		T114	2		T148	6
auto[3623878656:3758096383]	auto[0]	142	1			T16	2		T188	2		T190	2
auto[3623878656:3758096383]	auto[1]	68	1			T18	2		T73	2		T27	2
auto[3758096384:3892314111]	auto[0]	152	1			T39	2		T20	2		T72	2
auto[3758096384:3892314111]	auto[1]	62	1			T5	2		T158	2		T72	2
auto[3892314112:4026531839]	auto[0]	124	1			T92	2		T84	4		T81	2
auto[3892314112:4026531839]	auto[1]	86	1			T83	2		T77	4		T55	2
auto[4026531840:4160749567]	auto[0]	146	1			T6	2		T38	2		T7	2
auto[4026531840:4160749567]	auto[1]	84	1			T80	2		T141	2		T41	4
auto[4160749568:4294967295]	auto[0]	140	1			T39	2		T28	4		T53	2
auto[4160749568:4294967295]	auto[1]	58	1			T38	2		T18	2		T103	2