Unified Coverage Report :: Group Instance : max_owner_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4400

1

T5

8

T13

6

T15

12

auto[1]

2138

1

T5

2

T13

8

T14

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	192	1			T125	2		T84	2		T134	2
auto[134217728:268435455]	186	1			T18	2		T48	2		T66	4
auto[268435456:402653183]	210	1			T18	4		T84	2		T99	2
auto[402653184:536870911]	230	1			T99	2		T66	4		T53	2
auto[536870912:671088639]	216	1			T35	2		T18	2		T76	2
auto[671088640:805306367]	218	1			T28	2		T18	2		T99	2
auto[805306368:939524095]	204	1			T212	2		T66	8		T204	2
auto[939524096:1073741823]	212	1			T17	2		T212	4		T25	2
auto[1073741824:1207959551]	206	1			T18	2		T69	2		T52	2
auto[1207959552:1342177279]	210	1			T17	2		T48	4		T25	2
auto[1342177280:1476395007]	192	1			T18	2		T76	2		T99	2
auto[1476395008:1610612735]	264	1			T5	2		T14	2		T15	2
auto[1610612736:1744830463]	200	1			T18	4		T84	2		T38	2
auto[1744830464:1879048191]	196	1			T99	2		T70	2		T206	2
auto[1879048192:2013265919]	194	1			T18	4		T78	2		T99	2
auto[2013265920:2147483647]	204	1			T5	2		T13	2		T16	2
auto[2147483648:2281701375]	208	1			T5	2		T13	2		T38	2
auto[2281701376:2415919103]	196	1			T35	2		T18	4		T76	2
auto[2415919104:2550136831]	184	1			T38	2		T149	2		T215	2
auto[2550136832:2684354559]	190	1			T15	2		T18	2		T76	2
auto[2684354560:2818572287]	204	1			T13	2		T15	2		T18	6
auto[2818572288:2952790015]	202	1			T18	2		T99	4		T69	2
auto[2952790016:3087007743]	230	1			T17	2		T18	2		T48	2
auto[3087007744:3221225471]	194	1			T15	4		T134	2		T67	2
auto[3221225472:3355443199]	188	1			T13	4		T15	2		T99	2
auto[3355443200:3489660927]	216	1			T5	2		T136	2		T204	2
auto[3489660928:3623878655]	192	1			T18	4		T204	2		T126	2
auto[3623878656:3758096383]	192	1			T48	2		T212	2		T38	2
auto[3758096384:3892314111]	194	1			T5	2		T15	2		T16	2
auto[3892314112:4026531839]	204	1			T13	2		T35	2		T69	2
auto[4026531840:4160749567]	192	1			T17	2		T66	4		T67	2
auto[4160749568:4294967295]	218	1			T13	2		T18	4		T66	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	120	1			T125	2		T84	2		T134	2
auto[0:134217727]	auto[1]	72	1			T108	2		T254	2		T207	2
auto[134217728:268435455]	auto[0]	140	1			T48	2		T66	2		T248	2
auto[134217728:268435455]	auto[1]	46	1			T18	2		T66	2		T387	2
auto[268435456:402653183]	auto[0]	134	1			T18	2		T84	2		T99	2
auto[268435456:402653183]	auto[1]	76	1			T18	2		T71	2		T210	2
auto[402653184:536870911]	auto[0]	138	1			T99	2		T53	2		T68	6
auto[402653184:536870911]	auto[1]	92	1			T66	4		T207	2		T215	2
auto[536870912:671088639]	auto[0]	144	1			T35	2		T76	2		T69	2
auto[536870912:671088639]	auto[1]	72	1			T18	2		T48	2		T67	2
auto[671088640:805306367]	auto[0]	136	1			T18	2		T99	2		T134	2
auto[671088640:805306367]	auto[1]	82	1			T28	2		T71	2		T6	2
auto[805306368:939524095]	auto[0]	130	1			T212	2		T66	6		T204	2
auto[805306368:939524095]	auto[1]	74	1			T66	2		T71	2		T68	4
auto[939524096:1073741823]	auto[0]	140	1			T17	2		T212	4		T25	2
auto[939524096:1073741823]	auto[1]	72	1			T128	2		T358	2		T394	2
auto[1073741824:1207959551]	auto[0]	144	1			T69	2		T52	2		T53	2
auto[1073741824:1207959551]	auto[1]	62	1			T18	2		T200	2		T110	2
auto[1207959552:1342177279]	auto[0]	142	1			T48	4		T25	2		T69	2
auto[1207959552:1342177279]	auto[1]	68	1			T17	2		T6	2		T206	2
auto[1342177280:1476395007]	auto[0]	134	1			T18	2		T134	2		T212	2
auto[1342177280:1476395007]	auto[1]	58	1			T76	2		T99	2		T66	2
auto[1476395008:1610612735]	auto[0]	174	1			T15	2		T18	4		T48	2
auto[1476395008:1610612735]	auto[1]	90	1			T5	2		T14	2		T16	2
auto[1610612736:1744830463]	auto[0]	150	1			T18	4		T84	2		T38	2
auto[1610612736:1744830463]	auto[1]	50	1			T68	4		T110	2		T336	2
auto[1744830464:1879048191]	auto[0]	120	1			T68	6		T422	2		T111	2
auto[1744830464:1879048191]	auto[1]	76	1			T99	2		T70	2		T206	2
auto[1879048192:2013265919]	auto[0]	130	1			T18	4		T99	2		T69	2
auto[1879048192:2013265919]	auto[1]	64	1			T78	2		T80	2		T358	2
auto[2013265920:2147483647]	auto[0]	158	1			T5	2		T13	2		T18	2
auto[2013265920:2147483647]	auto[1]	46	1			T16	2		T67	2		T110	2
auto[2147483648:2281701375]	auto[0]	146	1			T5	2		T13	2		T66	2
auto[2147483648:2281701375]	auto[1]	62	1			T38	2		T109	2		T244	2
auto[2281701376:2415919103]	auto[0]	122	1			T18	2		T76	2		T134	2
auto[2281701376:2415919103]	auto[1]	74	1			T35	2		T18	2		T254	4
auto[2415919104:2550136831]	auto[0]	130	1			T38	2		T149	2		T80	2
auto[2415919104:2550136831]	auto[1]	54	1			T215	2		T209	2		T206	2
auto[2550136832:2684354559]	auto[0]	118	1			T15	2		T48	2		T66	4
auto[2550136832:2684354559]	auto[1]	72	1			T18	2		T76	2		T67	2
auto[2684354560:2818572287]	auto[0]	138	1			T13	2		T18	6		T76	2
auto[2684354560:2818572287]	auto[1]	66	1			T15	2		T69	2		T136	2
auto[2818572288:2952790015]	auto[0]	138	1			T18	2		T99	4		T69	2
auto[2818572288:2952790015]	auto[1]	64	1			T109	2		T372	2		T145	2
auto[2952790016:3087007743]	auto[0]	146	1			T17	2		T18	2		T48	2
auto[2952790016:3087007743]	auto[1]	84	1			T25	2		T69	2		T136	2
auto[3087007744:3221225471]	auto[0]	146	1			T15	4		T134	2		T70	2
auto[3087007744:3221225471]	auto[1]	48	1			T67	2		T68	4		T302	2
auto[3221225472:3355443199]	auto[0]	128	1			T15	2		T66	2		T67	2
auto[3221225472:3355443199]	auto[1]	60	1			T13	4		T99	2		T6	2
auto[3355443200:3489660927]	auto[0]	140	1			T5	2		T136	2		T204	2
auto[3355443200:3489660927]	auto[1]	76	1			T358	2		T244	2		T29	2
auto[3489660928:3623878655]	auto[0]	136	1			T18	4		T68	6		T307	2
auto[3489660928:3623878655]	auto[1]	56	1			T204	2		T126	2		T68	2
auto[3623878656:3758096383]	auto[0]	128	1			T212	2		T207	2		T68	2
auto[3623878656:3758096383]	auto[1]	64	1			T48	2		T38	2		T136	2
auto[3758096384:3892314111]	auto[0]	134	1			T5	2		T15	2		T18	2
auto[3758096384:3892314111]	auto[1]	60	1			T16	2		T372	2		T428	2
auto[3892314112:4026531839]	auto[0]	134	1			T69	2		T66	4		T53	2
auto[3892314112:4026531839]	auto[1]	70	1			T13	2		T35	2		T248	2
auto[4026531840:4160749567]	auto[0]	148	1			T17	2		T66	4		T67	2
auto[4026531840:4160749567]	auto[1]	44	1			T424	2		T371	2		T273	2
auto[4160749568:4294967295]	auto[0]	134	1			T18	2		T66	2		T109	2
auto[4160749568:4294967295]	auto[1]	84	1			T13	2		T18	2		T137	2