Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4412

1

T5

4

T13

14

T15

14

auto[1]

2122

1

T5

6

T14

2

T17

2

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	218	1			T13	2		T15	4		T125	2
auto[134217728:268435455]	192	1			T18	2		T99	2		T109	2
auto[268435456:402653183]	190	1			T134	2		T66	4		T108	2
auto[402653184:536870911]	196	1			T35	2		T18	4		T69	2
auto[536870912:671088639]	228	1			T14	2		T18	2		T25	2
auto[671088640:805306367]	216	1			T5	2		T15	2		T18	8
auto[805306368:939524095]	232	1			T35	2		T18	2		T84	2
auto[939524096:1073741823]	172	1			T15	2		T18	2		T99	2
auto[1073741824:1207959551]	194	1			T15	2		T17	2		T134	2
auto[1207959552:1342177279]	172	1			T66	2		T137	2		T70	2
auto[1342177280:1476395007]	190	1			T99	2		T69	2		T66	2
auto[1476395008:1610612735]	228	1			T13	2		T25	2		T66	2
auto[1610612736:1744830463]	216	1			T18	4		T66	2		T204	2
auto[1744830464:1879048191]	178	1			T16	2		T18	8		T99	2
auto[1879048192:2013265919]	220	1			T17	2		T99	2		T66	4
auto[2013265920:2147483647]	188	1			T18	6		T48	2		T38	2
auto[2147483648:2281701375]	242	1			T99	2		T134	2		T212	2
auto[2281701376:2415919103]	206	1			T16	2		T17	2		T66	4
auto[2415919104:2550136831]	216	1			T17	2		T76	2		T84	2
auto[2550136832:2684354559]	178	1			T16	2		T18	6		T84	2
auto[2684354560:2818572287]	168	1			T13	6		T48	2		T66	2
auto[2818572288:2952790015]	182	1			T76	2		T25	2		T69	2
auto[2952790016:3087007743]	198	1			T5	4		T28	2		T18	4
auto[3087007744:3221225471]	236	1			T35	2		T18	4		T76	2
auto[3221225472:3355443199]	262	1			T5	2		T13	2		T18	2
auto[3355443200:3489660927]	206	1			T212	2		T68	8		T80	2
auto[3489660928:3623878655]	190	1			T66	2		T71	2		T206	2
auto[3623878656:3758096383]	222	1			T15	2		T18	2		T25	2
auto[3758096384:3892314111]	194	1			T69	2		T136	2		T67	2
auto[3892314112:4026531839]	190	1			T13	2		T18	2		T254	2
auto[4026531840:4160749567]	178	1			T5	2		T15	2		T18	2
auto[4160749568:4294967295]	236	1			T134	2		T69	4		T52	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	158	1			T13	2		T15	4		T76	2
auto[0:134217727]	auto[1]	60	1			T125	2		T210	2		T139	2
auto[134217728:268435455]	auto[0]	140	1			T18	2		T99	2		T109	2
auto[134217728:268435455]	auto[1]	52	1			T248	2		T205	2		T206	2
auto[268435456:402653183]	auto[0]	132	1			T134	2		T66	2		T71	2
auto[268435456:402653183]	auto[1]	58	1			T66	2		T108	2		T68	2
auto[402653184:536870911]	auto[0]	128	1			T18	2		T69	2		T66	2
auto[402653184:536870911]	auto[1]	68	1			T35	2		T18	2		T67	2
auto[536870912:671088639]	auto[0]	150	1			T25	2		T69	2		T137	2
auto[536870912:671088639]	auto[1]	78	1			T14	2		T18	2		T387	2
auto[671088640:805306367]	auto[0]	146	1			T15	2		T18	4		T134	2
auto[671088640:805306367]	auto[1]	70	1			T5	2		T18	4		T206	2
auto[805306368:939524095]	auto[0]	162	1			T35	2		T84	2		T48	2
auto[805306368:939524095]	auto[1]	70	1			T18	2		T66	2		T204	4
auto[939524096:1073741823]	auto[0]	114	1			T15	2		T18	2		T99	2
auto[939524096:1073741823]	auto[1]	58	1			T48	2		T111	2		T114	2
auto[1073741824:1207959551]	auto[0]	146	1			T15	2		T17	2		T134	2
auto[1073741824:1207959551]	auto[1]	48	1			T48	2		T70	2		T68	2
auto[1207959552:1342177279]	auto[0]	114	1			T70	2		T68	6		T147	2
auto[1207959552:1342177279]	auto[1]	58	1			T66	2		T137	2		T189	2
auto[1342177280:1476395007]	auto[0]	108	1			T99	2		T69	2		T208	2
auto[1342177280:1476395007]	auto[1]	82	1			T66	2		T136	2		T71	2
auto[1476395008:1610612735]	auto[0]	160	1			T13	2		T66	2		T149	2
auto[1476395008:1610612735]	auto[1]	68	1			T25	2		T208	2		T80	2
auto[1610612736:1744830463]	auto[0]	152	1			T18	4		T66	2		T126	2
auto[1610612736:1744830463]	auto[1]	64	1			T204	2		T67	2		T68	2
auto[1744830464:1879048191]	auto[0]	110	1			T16	2		T18	2		T99	2
auto[1744830464:1879048191]	auto[1]	68	1			T18	6		T66	2		T206	2
auto[1879048192:2013265919]	auto[0]	152	1			T17	2		T99	2		T66	4
auto[1879048192:2013265919]	auto[1]	68	1			T49	2		T300	2		T196	2
auto[2013265920:2147483647]	auto[0]	134	1			T18	4		T48	2		T38	2
auto[2013265920:2147483647]	auto[1]	54	1			T18	2		T215	2		T210	2
auto[2147483648:2281701375]	auto[0]	164	1			T99	2		T212	2		T38	2
auto[2147483648:2281701375]	auto[1]	78	1			T134	2		T66	2		T6	2
auto[2281701376:2415919103]	auto[0]	136	1			T16	2		T66	4		T126	2
auto[2281701376:2415919103]	auto[1]	70	1			T17	2		T127	2		T68	2
auto[2415919104:2550136831]	auto[0]	130	1			T17	2		T76	2		T84	2
auto[2415919104:2550136831]	auto[1]	86	1			T108	2		T95	2		T270	2
auto[2550136832:2684354559]	auto[0]	130	1			T16	2		T18	4		T84	2
auto[2550136832:2684354559]	auto[1]	48	1			T18	2		T48	2		T67	2
auto[2684354560:2818572287]	auto[0]	122	1			T13	6		T66	2		T67	2
auto[2684354560:2818572287]	auto[1]	46	1			T48	2		T428	2		T96	2
auto[2818572288:2952790015]	auto[0]	138	1			T76	2		T68	4		T139	2
auto[2818572288:2952790015]	auto[1]	44	1			T25	2		T69	2		T66	2
auto[2952790016:3087007743]	auto[0]	126	1			T5	2		T18	2		T212	2
auto[2952790016:3087007743]	auto[1]	72	1			T5	2		T28	2		T18	2
auto[3087007744:3221225471]	auto[0]	158	1			T76	2		T212	2		T71	2
auto[3087007744:3221225471]	auto[1]	78	1			T35	2		T18	4		T6	2
auto[3221225472:3355443199]	auto[0]	172	1			T13	2		T18	2		T76	2
auto[3221225472:3355443199]	auto[1]	90	1			T5	2		T78	2		T99	2
auto[3355443200:3489660927]	auto[0]	138	1			T212	2		T68	2		T110	2
auto[3355443200:3489660927]	auto[1]	68	1			T68	6		T80	2		T94	2
auto[3489660928:3623878655]	auto[0]	108	1			T66	2		T71	2		T206	2
auto[3489660928:3623878655]	auto[1]	82	1			T80	2		T9	2		T429	2
auto[3623878656:3758096383]	auto[0]	152	1			T15	2		T18	2		T25	2
auto[3623878656:3758096383]	auto[1]	70	1			T136	2		T52	2		T149	2
auto[3758096384:3892314111]	auto[0]	130	1			T69	2		T136	2		T67	2
auto[3758096384:3892314111]	auto[1]	64	1			T336	2		T274	2		T196	2
auto[3892314112:4026531839]	auto[0]	126	1			T13	2		T18	2		T254	2
auto[3892314112:4026531839]	auto[1]	64	1			T22	2		T154	2		T430	2
auto[4026531840:4160749567]	auto[0]	108	1			T5	2		T15	2		T18	2
auto[4026531840:4160749567]	auto[1]	70	1			T139	2		T22	2		T95	2
auto[4160749568:4294967295]	auto[0]	168	1			T134	2		T69	2		T52	2
auto[4160749568:4294967295]	auto[1]	68	1			T69	2		T137	2		T68	2