Unified Coverage Report :: Group Instance : max_creator_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4400

1

T3

4

T4

2

T14

4

auto[1]

2038

1

T3

4

T4

8

T14

4

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	236	1			T20	2		T212	2		T44	2
auto[134217728:268435455]	182	1			T65	2		T67	2		T58	2
auto[268435456:402653183]	196	1			T18	2		T31	2		T19	2
auto[402653184:536870911]	198	1			T20	2		T208	2		T8	2
auto[536870912:671088639]	164	1			T14	2		T129	2		T212	2
auto[671088640:805306367]	214	1			T3	2		T5	2		T127	2
auto[805306368:939524095]	216	1			T4	2		T14	2		T18	2
auto[939524096:1073741823]	236	1			T19	2		T90	2		T64	2
auto[1073741824:1207959551]	194	1			T4	2		T32	2		T44	2
auto[1207959552:1342177279]	202	1			T15	2		T89	2		T35	2
auto[1342177280:1476395007]	178	1			T3	2		T129	2		T64	2
auto[1476395008:1610612735]	212	1			T4	2		T5	2		T67	2
auto[1610612736:1744830463]	200	1			T208	2		T212	2		T66	2
auto[1744830464:1879048191]	204	1			T15	2		T18	2		T19	2
auto[1879048192:2013265919]	198	1			T65	2		T34	2		T67	2
auto[2013265920:2147483647]	232	1			T14	2		T19	2		T90	2
auto[2147483648:2281701375]	244	1			T90	2		T94	2		T72	2
auto[2281701376:2415919103]	210	1			T18	2		T5	2		T90	2
auto[2415919104:2550136831]	158	1			T34	2		T69	2		T39	2
auto[2550136832:2684354559]	214	1			T4	2		T19	2		T20	2
auto[2684354560:2818572287]	180	1			T18	2		T20	2		T32	2
auto[2818572288:2952790015]	198	1			T20	2		T5	2		T208	2
auto[2952790016:3087007743]	196	1			T206	2		T39	2		T127	2
auto[3087007744:3221225471]	182	1			T89	2		T20	2		T65	2
auto[3221225472:3355443199]	200	1			T89	2		T20	2		T206	6
auto[3355443200:3489660927]	218	1			T4	2		T31	2		T5	2
auto[3489660928:3623878655]	226	1			T3	2		T20	2		T64	2
auto[3623878656:3758096383]	202	1			T18	2		T129	2		T90	2
auto[3758096384:3892314111]	170	1			T90	2		T58	2		T127	2
auto[3892314112:4026531839]	184	1			T90	4		T212	2		T8	2
auto[4026531840:4160749567]	230	1			T3	2		T14	2		T206	2
auto[4160749568:4294967295]	164	1			T90	2		T212	2		T60	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	168	1			T20	2		T44	2		T112	2
auto[0:134217727]	auto[1]	68	1			T212	2		T6	2		T45	2
auto[134217728:268435455]	auto[0]	132	1			T67	2		T94	2		T112	2
auto[134217728:268435455]	auto[1]	50	1			T65	2		T58	2		T292	2
auto[268435456:402653183]	auto[0]	114	1			T129	2		T208	2		T8	2
auto[268435456:402653183]	auto[1]	82	1			T18	2		T31	2		T19	2
auto[402653184:536870911]	auto[0]	118	1			T20	2		T8	2		T211	2
auto[402653184:536870911]	auto[1]	80	1			T208	2		T219	4		T98	2
auto[536870912:671088639]	auto[0]	110	1			T129	2		T212	2		T127	2
auto[536870912:671088639]	auto[1]	54	1			T14	2		T44	2		T246	2
auto[671088640:805306367]	auto[0]	156	1			T3	2		T5	2		T127	2
auto[671088640:805306367]	auto[1]	58	1			T97	2		T51	2		T262	2
auto[805306368:939524095]	auto[0]	144	1			T4	2		T14	2		T18	2
auto[805306368:939524095]	auto[1]	72	1			T8	2		T219	2		T45	4
auto[939524096:1073741823]	auto[0]	156	1			T19	2		T90	2		T64	2
auto[939524096:1073741823]	auto[1]	80	1			T65	2		T218	2		T6	2
auto[1073741824:1207959551]	auto[0]	134	1			T32	2		T44	2		T58	2
auto[1073741824:1207959551]	auto[1]	60	1			T4	2		T250	2		T72	2
auto[1207959552:1342177279]	auto[0]	132	1			T89	2		T218	2		T56	4
auto[1207959552:1342177279]	auto[1]	70	1			T15	2		T35	2		T91	2
auto[1342177280:1476395007]	auto[0]	118	1			T129	2		T218	4		T59	2
auto[1342177280:1476395007]	auto[1]	60	1			T3	2		T64	2		T44	2
auto[1476395008:1610612735]	auto[0]	122	1			T5	2		T67	2		T218	2
auto[1476395008:1610612735]	auto[1]	90	1			T4	2		T39	2		T46	2
auto[1610612736:1744830463]	auto[0]	132	1			T212	2		T211	2		T91	2
auto[1610612736:1744830463]	auto[1]	68	1			T208	2		T66	2		T34	2
auto[1744830464:1879048191]	auto[0]	128	1			T15	2		T18	2		T19	2
auto[1744830464:1879048191]	auto[1]	76	1			T56	2		T21	2		T122	2
auto[1879048192:2013265919]	auto[0]	128	1			T67	2		T131	2		T6	4
auto[1879048192:2013265919]	auto[1]	70	1			T65	2		T34	2		T44	2
auto[2013265920:2147483647]	auto[0]	170	1			T14	2		T19	2		T90	2
auto[2013265920:2147483647]	auto[1]	62	1			T212	2		T65	2		T97	2
auto[2147483648:2281701375]	auto[0]	182	1			T90	2		T94	2		T72	2
auto[2147483648:2281701375]	auto[1]	62	1			T151	2		T45	2		T420	2
auto[2281701376:2415919103]	auto[0]	160	1			T18	2		T90	2		T32	2
auto[2281701376:2415919103]	auto[1]	50	1			T5	2		T6	2		T246	2
auto[2415919104:2550136831]	auto[0]	98	1			T39	2		T44	2		T59	2
auto[2415919104:2550136831]	auto[1]	60	1			T34	2		T69	2		T250	2
auto[2550136832:2684354559]	auto[0]	142	1			T19	2		T8	2		T6	6
auto[2550136832:2684354559]	auto[1]	72	1			T4	2		T20	2		T5	2
auto[2684354560:2818572287]	auto[0]	132	1			T20	2		T32	2		T212	2
auto[2684354560:2818572287]	auto[1]	48	1			T18	2		T213	2		T66	2
auto[2818572288:2952790015]	auto[0]	138	1			T20	2		T64	2		T71	2
auto[2818572288:2952790015]	auto[1]	60	1			T5	2		T208	2		T211	2
auto[2952790016:3087007743]	auto[0]	128	1			T206	2		T39	2		T127	2
auto[2952790016:3087007743]	auto[1]	68	1			T219	2		T124	2		T6	4
auto[3087007744:3221225471]	auto[0]	132	1			T89	2		T20	2		T44	2
auto[3087007744:3221225471]	auto[1]	50	1			T65	2		T154	2		T133	2
auto[3221225472:3355443199]	auto[0]	140	1			T89	2		T20	2		T206	6
auto[3221225472:3355443199]	auto[1]	60	1			T71	2		T6	2		T398	2
auto[3355443200:3489660927]	auto[0]	144	1			T31	2		T5	2		T39	4
auto[3355443200:3489660927]	auto[1]	74	1			T4	2		T132	2		T135	2
auto[3489660928:3623878655]	auto[0]	166	1			T3	2		T20	2		T39	2
auto[3489660928:3623878655]	auto[1]	60	1			T64	2		T34	2		T27	2
auto[3623878656:3758096383]	auto[0]	154	1			T129	2		T90	2		T32	2
auto[3623878656:3758096383]	auto[1]	48	1			T18	2		T69	2		T219	2
auto[3758096384:3892314111]	auto[0]	120	1			T90	2		T127	2		T98	2
auto[3758096384:3892314111]	auto[1]	50	1			T58	2		T21	2		T246	2
auto[3892314112:4026531839]	auto[0]	130	1			T90	4		T212	2		T64	2
auto[3892314112:4026531839]	auto[1]	54	1			T8	2		T6	2		T133	2
auto[4026531840:4160749567]	auto[0]	166	1			T206	2		T34	2		T219	2
auto[4026531840:4160749567]	auto[1]	64	1			T3	2		T14	2		T25	2
auto[4160749568:4294967295]	auto[0]	106	1			T90	2		T212	2		T60	2
auto[4160749568:4294967295]	auto[1]	58	1			T379	2		T139	2		T141	2