Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4472

1

T4

12

T16

12

T17

16

auto[1]

2187

1

T17

2

T38

4

T23

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	248	1			T74	2		T144	2		T146	2
auto[134217728:268435455]	210	1			T16	2		T17	2		T38	2
auto[268435456:402653183]	214	1			T52	2		T37	2		T48	2
auto[402653184:536870911]	176	1			T4	2		T17	2		T99	2
auto[536870912:671088639]	208	1			T17	2		T38	2		T99	2
auto[671088640:805306367]	216	1			T127	2		T34	2		T257	2
auto[805306368:939524095]	232	1			T17	2		T64	2		T34	2
auto[939524096:1073741823]	216	1			T4	2		T16	2		T17	2
auto[1073741824:1207959551]	244	1			T19	2		T40	2		T71	2
auto[1207959552:1342177279]	214	1			T38	4		T85	2		T71	2
auto[1342177280:1476395007]	168	1			T21	2		T7	4		T68	2
auto[1476395008:1610612735]	192	1			T127	2		T30	4		T257	2
auto[1610612736:1744830463]	180	1			T69	2		T146	2		T287	2
auto[1744830464:1879048191]	196	1			T38	2		T48	2		T8	2
auto[1879048192:2013265919]	224	1			T23	2		T19	2		T127	2
auto[2013265920:2147483647]	236	1			T4	2		T23	2		T20	2
auto[2147483648:2281701375]	212	1			T20	2		T99	2		T71	2
auto[2281701376:2415919103]	220	1			T52	2		T209	2		T21	2
auto[2415919104:2550136831]	192	1			T16	2		T20	2		T127	2
auto[2550136832:2684354559]	216	1			T38	2		T19	4		T165	2
auto[2684354560:2818572287]	208	1			T4	2		T129	2		T64	2
auto[2818572288:2952790015]	162	1			T16	4		T20	2		T69	2
auto[2952790016:3087007743]	234	1			T16	2		T17	2		T52	2
auto[3087007744:3221225471]	196	1			T4	2		T17	4		T74	2
auto[3221225472:3355443199]	206	1			T127	2		T87	2		T30	2
auto[3355443200:3489660927]	204	1			T4	2		T38	2		T23	2
auto[3489660928:3623878655]	216	1			T37	2		T99	2		T21	4
auto[3623878656:3758096383]	235	1			T129	2		T48	2		T30	2
auto[3758096384:3892314111]	182	1			T37	2		T99	2		T85	2
auto[3892314112:4026531839]	204	1			T17	2		T49	2		T27	4
auto[4026531840:4160749567]	210	1			T37	2		T99	2		T30	2
auto[4160749568:4294967295]	188	1			T38	2		T7	2		T27	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	174	1			T74	2		T144	2		T146	2
auto[0:134217727]	auto[1]	74	1			T9	2		T286	2		T281	4
auto[134217728:268435455]	auto[0]	152	1			T16	2		T17	2		T38	2
auto[134217728:268435455]	auto[1]	58	1			T106	2		T286	2		T262	2
auto[268435456:402653183]	auto[0]	148	1			T48	2		T71	2		T314	4
auto[268435456:402653183]	auto[1]	66	1			T52	2		T37	2		T68	2
auto[402653184:536870911]	auto[0]	128	1			T4	2		T17	2		T99	2
auto[402653184:536870911]	auto[1]	48	1			T148	2		T65	2		T154	2
auto[536870912:671088639]	auto[0]	148	1			T17	2		T38	2		T99	2
auto[536870912:671088639]	auto[1]	60	1			T87	2		T74	2		T28	2
auto[671088640:805306367]	auto[0]	138	1			T127	2		T34	2		T257	2
auto[671088640:805306367]	auto[1]	78	1			T65	2		T154	2		T155	2
auto[805306368:939524095]	auto[0]	146	1			T69	2		T45	2		T79	4
auto[805306368:939524095]	auto[1]	86	1			T17	2		T64	2		T34	2
auto[939524096:1073741823]	auto[0]	150	1			T4	2		T16	2		T17	2
auto[939524096:1073741823]	auto[1]	66	1			T23	2		T19	2		T40	2
auto[1073741824:1207959551]	auto[0]	170	1			T40	2		T71	2		T78	4
auto[1073741824:1207959551]	auto[1]	74	1			T19	2		T28	2		T101	2
auto[1207959552:1342177279]	auto[0]	168	1			T38	2		T85	2		T71	2
auto[1207959552:1342177279]	auto[1]	46	1			T38	2		T51	2		T147	2
auto[1342177280:1476395007]	auto[0]	112	1			T21	2		T7	2		T101	2
auto[1342177280:1476395007]	auto[1]	56	1			T7	2		T68	2		T287	2
auto[1476395008:1610612735]	auto[0]	116	1			T30	2		T257	2		T8	2
auto[1476395008:1610612735]	auto[1]	76	1			T127	2		T30	2		T80	2
auto[1610612736:1744830463]	auto[0]	122	1			T146	2		T260	2		T106	2
auto[1610612736:1744830463]	auto[1]	58	1			T69	2		T287	2		T66	2
auto[1744830464:1879048191]	auto[0]	126	1			T48	2		T8	2		T45	2
auto[1744830464:1879048191]	auto[1]	70	1			T38	2		T45	2		T28	2
auto[1879048192:2013265919]	auto[0]	140	1			T23	2		T144	2		T106	2
auto[1879048192:2013265919]	auto[1]	84	1			T19	2		T127	2		T64	2
auto[2013265920:2147483647]	auto[0]	158	1			T4	2		T20	2		T85	2
auto[2013265920:2147483647]	auto[1]	78	1			T23	2		T258	2		T65	2
auto[2147483648:2281701375]	auto[0]	146	1			T20	2		T71	2		T34	2
auto[2147483648:2281701375]	auto[1]	66	1			T99	2		T148	2		T457	2
auto[2281701376:2415919103]	auto[0]	152	1			T52	2		T21	2		T75	2
auto[2281701376:2415919103]	auto[1]	68	1			T209	2		T165	2		T51	2
auto[2415919104:2550136831]	auto[0]	122	1			T16	2		T257	2		T51	2
auto[2415919104:2550136831]	auto[1]	70	1			T20	2		T127	2		T69	2
auto[2550136832:2684354559]	auto[0]	148	1			T38	2		T95	2		T210	2
auto[2550136832:2684354559]	auto[1]	68	1			T19	4		T165	2		T103	2
auto[2684354560:2818572287]	auto[0]	148	1			T4	2		T129	2		T21	2
auto[2684354560:2818572287]	auto[1]	60	1			T64	2		T212	2		T155	2
auto[2818572288:2952790015]	auto[0]	114	1			T16	4		T303	2		T8	2
auto[2818572288:2952790015]	auto[1]	48	1			T20	2		T69	2		T9	2
auto[2952790016:3087007743]	auto[0]	148	1			T16	2		T17	2		T52	2
auto[2952790016:3087007743]	auto[1]	86	1			T143	2		T9	4		T79	2
auto[3087007744:3221225471]	auto[0]	124	1			T4	2		T17	4		T67	2
auto[3087007744:3221225471]	auto[1]	72	1			T74	2		T69	2		T303	2
auto[3221225472:3355443199]	auto[0]	154	1			T87	2		T30	2		T257	2
auto[3221225472:3355443199]	auto[1]	52	1			T127	2		T51	2		T45	4
auto[3355443200:3489660927]	auto[0]	132	1			T4	2		T38	2		T69	2
auto[3355443200:3489660927]	auto[1]	72	1			T23	2		T152	2		T65	2
auto[3489660928:3623878655]	auto[0]	136	1			T99	2		T21	4		T48	2
auto[3489660928:3623878655]	auto[1]	80	1			T37	2		T75	2		T165	2
auto[3623878656:3758096383]	auto[0]	142	1			T129	2		T48	2		T30	2
auto[3623878656:3758096383]	auto[1]	93	1			T74	4		T78	2		T154	2
auto[3758096384:3892314111]	auto[0]	104	1			T99	2		T85	2		T87	2
auto[3758096384:3892314111]	auto[1]	78	1			T37	2		T48	2		T87	2
auto[3892314112:4026531839]	auto[0]	142	1			T17	2		T27	4		T45	4
auto[3892314112:4026531839]	auto[1]	62	1			T49	2		T310	2		T309	2
auto[4026531840:4160749567]	auto[0]	142	1			T30	2		T260	2		T9	2
auto[4026531840:4160749567]	auto[1]	68	1			T37	2		T99	2		T49	2
auto[4160749568:4294967295]	auto[0]	122	1			T38	2		T7	2		T27	2
auto[4160749568:4294967295]	auto[1]	66	1			T285	2		T282	2		T108	2