Unified Coverage Report :: Group Instance : max_owner_int_key_ver_shadowed

Summary for Variable regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for regwen_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4638

1

T14

4

T15

2

T74

6

auto[1]

2104

1

T4

6

T14

2

T15

6

---

Summary for Variable sw_input_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	32	0	32	100.00

Automatically Generated Bins for sw_input_cp

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	216	1			T14	2		T70	2		T48	2
auto[134217728:268435455]	200	1			T19	2		T5	2		T207	2
auto[268435456:402653183]	222	1			T5	2		T26	2		T92	2
auto[402653184:536870911]	170	1			T26	2		T114	2		T126	2
auto[536870912:671088639]	202	1			T48	2		T94	4		T6	4
auto[671088640:805306367]	218	1			T71	2		T60	2		T65	2
auto[805306368:939524095]	194	1			T129	2		T48	2		T60	4
auto[939524096:1073741823]	166	1			T14	2		T38	2		T28	2
auto[1073741824:1207959551]	204	1			T39	2		T207	4		T60	2
auto[1207959552:1342177279]	236	1			T15	2		T70	2		T60	2
auto[1342177280:1476395007]	226	1			T38	2		T26	2		T71	2
auto[1476395008:1610612735]	262	1			T74	2		T39	2		T5	2
auto[1610612736:1744830463]	222	1			T15	4		T38	2		T60	2
auto[1744830464:1879048191]	206	1			T14	2		T71	2		T60	2
auto[1879048192:2013265919]	172	1			T15	2		T93	2		T94	4
auto[2013265920:2147483647]	226	1			T74	2		T19	2		T39	2
auto[2147483648:2281701375]	182	1			T38	2		T114	2		T28	2
auto[2281701376:2415919103]	194	1			T60	2		T66	2		T49	2
auto[2415919104:2550136831]	252	1			T38	2		T39	2		T5	2
auto[2550136832:2684354559]	240	1			T207	2		T205	2		T58	2
auto[2684354560:2818572287]	204	1			T18	2		T91	2		T71	2
auto[2818572288:2952790015]	204	1			T19	2		T129	2		T205	2
auto[2952790016:3087007743]	240	1			T4	2		T38	2		T39	2
auto[3087007744:3221225471]	220	1			T4	2		T91	2		T207	2
auto[3221225472:3355443199]	192	1			T4	2		T92	2		T48	2
auto[3355443200:3489660927]	188	1			T17	2		T70	2		T60	6
auto[3489660928:3623878655]	204	1			T74	2		T114	2		T60	10
auto[3623878656:3758096383]	236	1			T19	2		T38	2		T5	2
auto[3758096384:3892314111]	198	1			T70	2		T60	6		T65	4
auto[3892314112:4026531839]	224	1			T19	2		T38	2		T39	2
auto[4026531840:4160749567]	200	1			T48	2		T58	2		T60	2
auto[4160749568:4294967295]	222	1			T39	2		T5	2		T48	2

---

Summary for Cross sw_input_x_regwen_cr

Samples crossed: sw_input_cp regwen_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	64	0	64	100.00

Automatically Generated Cross Bins for sw_input_x_regwen_cr

Bins

sw_input_cp	regwen_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0:134217727]	auto[0]	146	1			T14	2		T48	2		T60	2
auto[0:134217727]	auto[1]	70	1			T70	2		T27	2		T21	2
auto[134217728:268435455]	auto[0]	144	1			T5	2		T207	2		T60	2
auto[134217728:268435455]	auto[1]	56	1			T19	2		T156	2		T311	2
auto[268435456:402653183]	auto[0]	162	1			T5	2		T92	2		T114	2
auto[268435456:402653183]	auto[1]	60	1			T26	2		T126	2		T275	2
auto[402653184:536870911]	auto[0]	124	1			T114	2		T60	2		T29	2
auto[402653184:536870911]	auto[1]	46	1			T26	2		T126	2		T49	2
auto[536870912:671088639]	auto[0]	128	1			T48	2		T94	2		T6	4
auto[536870912:671088639]	auto[1]	74	1			T94	2		T256	2		T271	2
auto[671088640:805306367]	auto[0]	134	1			T71	2		T60	2		T65	2
auto[671088640:805306367]	auto[1]	84	1			T66	2		T30	2		T436	2
auto[805306368:939524095]	auto[0]	120	1			T48	2		T60	2		T206	4
auto[805306368:939524095]	auto[1]	74	1			T129	2		T60	2		T210	2
auto[939524096:1073741823]	auto[0]	106	1			T38	2		T48	2		T60	2
auto[939524096:1073741823]	auto[1]	60	1			T14	2		T28	2		T60	2
auto[1073741824:1207959551]	auto[0]	156	1			T207	2		T60	2		T66	2
auto[1073741824:1207959551]	auto[1]	48	1			T39	2		T207	2		T208	2
auto[1207959552:1342177279]	auto[0]	164	1			T15	2		T60	2		T29	2
auto[1207959552:1342177279]	auto[1]	72	1			T70	2		T379	2		T275	2
auto[1342177280:1476395007]	auto[0]	156	1			T26	2		T71	2		T73	4
auto[1342177280:1476395007]	auto[1]	70	1			T38	2		T60	2		T94	2
auto[1476395008:1610612735]	auto[0]	176	1			T74	2		T5	2		T26	2
auto[1476395008:1610612735]	auto[1]	86	1			T39	2		T60	2		T95	2
auto[1610612736:1744830463]	auto[0]	156	1			T38	2		T60	2		T138	2
auto[1610612736:1744830463]	auto[1]	66	1			T15	4		T95	2		T23	2
auto[1744830464:1879048191]	auto[0]	140	1			T14	2		T71	2		T60	2
auto[1744830464:1879048191]	auto[1]	66	1			T64	2		T379	2		T94	4
auto[1879048192:2013265919]	auto[0]	106	1			T94	2		T215	2		T127	2
auto[1879048192:2013265919]	auto[1]	66	1			T15	2		T93	2		T94	2
auto[2013265920:2147483647]	auto[0]	166	1			T74	2		T19	2		T5	4
auto[2013265920:2147483647]	auto[1]	60	1			T39	2		T101	2		T379	2
auto[2147483648:2281701375]	auto[0]	130	1			T38	2		T114	2		T58	2
auto[2147483648:2281701375]	auto[1]	52	1			T28	2		T48	2		T252	2
auto[2281701376:2415919103]	auto[0]	142	1			T60	2		T49	2		T94	2
auto[2281701376:2415919103]	auto[1]	52	1			T66	2		T94	2		T222	2
auto[2415919104:2550136831]	auto[0]	170	1			T38	2		T5	2		T91	2
auto[2415919104:2550136831]	auto[1]	82	1			T39	2		T92	2		T60	2
auto[2550136832:2684354559]	auto[0]	174	1			T207	2		T205	2		T58	2
auto[2550136832:2684354559]	auto[1]	66	1			T94	2		T220	2		T196	2
auto[2684354560:2818572287]	auto[0]	126	1			T71	2		T60	4		T138	2
auto[2684354560:2818572287]	auto[1]	78	1			T18	2		T91	2		T278	4
auto[2818572288:2952790015]	auto[0]	144	1			T19	2		T114	2		T71	2
auto[2818572288:2952790015]	auto[1]	60	1			T129	2		T205	2		T94	4
auto[2952790016:3087007743]	auto[0]	152	1			T38	2		T39	2		T114	2
auto[2952790016:3087007743]	auto[1]	88	1			T4	2		T58	2		T94	2
auto[3087007744:3221225471]	auto[0]	148	1			T207	2		T126	2		T60	2
auto[3087007744:3221225471]	auto[1]	72	1			T4	2		T91	2		T60	2
auto[3221225472:3355443199]	auto[0]	142	1			T92	2		T95	2		T138	2
auto[3221225472:3355443199]	auto[1]	50	1			T4	2		T48	2		T58	2
auto[3355443200:3489660927]	auto[0]	138	1			T60	6		T102	2		T94	4
auto[3355443200:3489660927]	auto[1]	50	1			T17	2		T70	2		T20	2
auto[3489660928:3623878655]	auto[0]	134	1			T74	2		T114	2		T60	8
auto[3489660928:3623878655]	auto[1]	70	1			T60	2		T64	2		T23	2
auto[3623878656:3758096383]	auto[0]	176	1			T19	2		T38	2		T5	2
auto[3623878656:3758096383]	auto[1]	60	1			T205	2		T60	4		T49	2
auto[3758096384:3892314111]	auto[0]	132	1			T60	4		T65	4		T101	2
auto[3758096384:3892314111]	auto[1]	66	1			T70	2		T60	2		T206	2
auto[3892314112:4026531839]	auto[0]	160	1			T19	2		T38	2		T48	2
auto[3892314112:4026531839]	auto[1]	64	1			T39	2		T116	2		T29	2
auto[4026531840:4160749567]	auto[0]	128	1			T48	2		T58	2		T60	2
auto[4026531840:4160749567]	auto[1]	72	1			T94	4		T152	2		T304	2
auto[4160749568:4294967295]	auto[0]	158	1			T39	2		T5	2		T48	2
auto[4160749568:4294967295]	auto[1]	64	1			T206	2		T94	2		T304	2