Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
92.86	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	1	13	92.86

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	1	13	92.86	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	1	13	92.86

User Defined Bins for output_digest_len

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
len_1	0	1	1

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	400	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	3790	1			T22	8		T30	27		T31	7
len_601_800	9020	1			T22	13		T30	61		T31	18
len_401_600	5940	1			T22	6		T30	32		T31	11
len_201_400	14700	1			T21	251		T22	7		T30	12
len_65_200	73590	1			T21	680		T22	3		T30	66
len_min_for_xof_require_squeeze	950	1			T21	10		T34	10		T35	9
len_keccak_block_sizes[72]	700	1			T21	5		T34	5		T35	9
len_keccak_block_sizes[104]	700	1			T21	5		T34	5		T35	9
len_keccak_block_sizes[136]	700	1			T21	5		T34	5		T35	9
len_keccak_block_sizes[144]	300	1			T21	5		T30	1		T34	5
len_keccak_block_sizes[168]	300	1			T21	5		T30	1		T34	5
len_datapath_width	14350	1			T20	246		T21	5		T30	20
len_2_63	212910	1			T21	1329		T22	23		T30	98