Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	701	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	6138	1			T12	3		T13	7		T14	11
len_601_800	13856	1			T12	11		T13	5		T14	21
len_401_600	9096	1			T12	2		T13	4		T14	12
len_201_400	16934	1			T12	1		T14	13		T37	13
len_65_200	74129	1			T15	685		T12	4		T14	5
len_min_for_xof_require_squeeze	1009	1			T15	9		T167	10		T34	9
len_keccak_block_sizes[72]	755	1			T15	9		T109	1		T167	5
len_keccak_block_sizes[104]	753	1			T15	9		T167	5		T34	9
len_keccak_block_sizes[136]	767	1			T15	9		T109	1		T167	5
len_keccak_block_sizes[144]	295	1			T167	5		T168	5		T169	5
len_keccak_block_sizes[168]	295	1			T109	1		T167	5		T168	5
len_datapath_width	14452	1			T5	3		T10	246		T15	9
len_2_63	213731	1			T5	6		T15	1643		T35	310
len_1	54	1			T171	1		T172	1		T24	1