Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	730	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5821	1			T4	10		T10	14		T11	21
len_601_800	13093	1			T4	48		T10	22		T11	33
len_401_600	8619	1			T4	24		T10	19		T11	32
len_201_400	16631	1			T4	13		T10	9		T11	12
len_65_200	74724	1			T4	4		T10	5		T11	6
len_min_for_xof_require_squeeze	1013	1			T11	1		T38	10		T156	1
len_keccak_block_sizes[72]	756	1			T38	5		T28	5		T17	1
len_keccak_block_sizes[104]	772	1			T37	1		T38	5		T27	1
len_keccak_block_sizes[136]	754	1			T38	5		T28	5		T166	5
len_keccak_block_sizes[144]	291	1			T38	5		T28	5		T17	1
len_keccak_block_sizes[168]	280	1			T38	5		T28	5		T17	1
len_datapath_width	14378	1			T4	2		T47	246		T38	5
len_2_63	215533	1			T4	10		T5	390		T6	374
len_1	63	1			T165	1		T167	1		T168	1