Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
349867 |
1 |
|
|
T4 |
80 |
|
T5 |
2 |
|
T6 |
156 |
auto[1] |
352309 |
1 |
|
|
T5 |
138 |
|
T12 |
316 |
|
T23 |
4672 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
175380 |
1 |
|
|
T4 |
12 |
|
T5 |
30 |
|
T6 |
42 |
lower_val |
173097 |
1 |
|
|
T4 |
22 |
|
T5 |
36 |
|
T6 |
36 |
zero_val |
2136 |
1 |
|
|
T4 |
1 |
|
T5 |
1 |
|
T6 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
262385 |
1 |
|
|
T4 |
42 |
|
T5 |
26 |
|
T6 |
82 |
lower_val |
262581 |
1 |
|
|
T4 |
38 |
|
T5 |
44 |
|
T6 |
74 |
zero_val |
177210 |
1 |
|
|
T5 |
70 |
|
T12 |
180 |
|
T23 |
2306 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
43687 |
1 |
|
|
T4 |
6 |
|
T6 |
25 |
|
T12 |
49 |
higher_val |
higher_val |
auto[1] |
22146 |
1 |
|
|
T5 |
6 |
|
T12 |
23 |
|
T23 |
288 |
higher_val |
lower_val |
auto[0] |
43354 |
1 |
|
|
T4 |
6 |
|
T6 |
17 |
|
T12 |
40 |
higher_val |
lower_val |
auto[1] |
21976 |
1 |
|
|
T5 |
9 |
|
T12 |
21 |
|
T23 |
286 |
higher_val |
zero_val |
auto[0] |
117 |
1 |
|
|
T12 |
1 |
|
T31 |
1 |
|
T14 |
1 |
higher_val |
zero_val |
auto[1] |
44100 |
1 |
|
|
T5 |
15 |
|
T12 |
58 |
|
T23 |
514 |
lower_val |
higher_val |
auto[0] |
42923 |
1 |
|
|
T4 |
14 |
|
T6 |
18 |
|
T10 |
1 |
lower_val |
higher_val |
auto[1] |
21565 |
1 |
|
|
T5 |
6 |
|
T12 |
9 |
|
T23 |
277 |
lower_val |
lower_val |
auto[0] |
43126 |
1 |
|
|
T4 |
8 |
|
T6 |
18 |
|
T10 |
1 |
lower_val |
lower_val |
auto[1] |
21643 |
1 |
|
|
T5 |
13 |
|
T12 |
19 |
|
T23 |
302 |
lower_val |
zero_val |
auto[0] |
98 |
1 |
|
|
T12 |
1 |
|
T23 |
1 |
|
T25 |
1 |
lower_val |
zero_val |
auto[1] |
43742 |
1 |
|
|
T5 |
17 |
|
T12 |
29 |
|
T23 |
548 |
zero_val |
higher_val |
auto[0] |
645 |
1 |
|
|
T6 |
1 |
|
T10 |
1 |
|
T12 |
2 |
zero_val |
higher_val |
auto[1] |
189 |
1 |
|
|
T12 |
1 |
|
T23 |
4 |
|
T13 |
1 |
zero_val |
lower_val |
auto[0] |
609 |
1 |
|
|
T4 |
1 |
|
T12 |
1 |
|
T24 |
1 |
zero_val |
lower_val |
auto[1] |
158 |
1 |
|
|
T12 |
3 |
|
T14 |
1 |
|
T15 |
1 |
zero_val |
zero_val |
auto[0] |
299 |
1 |
|
|
T5 |
1 |
|
T12 |
1 |
|
T23 |
1 |
zero_val |
zero_val |
auto[1] |
236 |
1 |
|
|
T23 |
2 |
|
T14 |
1 |
|
T87 |
3 |