Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
375676 |
1 |
|
|
T4 |
780 |
|
T6 |
2 |
|
T10 |
4530 |
auto[1] |
317018 |
1 |
|
|
T19 |
318 |
|
T20 |
360 |
|
T24 |
298 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
172853 |
1 |
|
|
T4 |
189 |
|
T6 |
1 |
|
T10 |
1050 |
lower_val |
171788 |
1 |
|
|
T4 |
192 |
|
T10 |
1056 |
|
T11 |
2 |
zero_val |
1924 |
1 |
|
|
T4 |
1 |
|
T6 |
1 |
|
T10 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
267406 |
1 |
|
|
T4 |
400 |
|
T10 |
2248 |
|
T11 |
2 |
lower_val |
266988 |
1 |
|
|
T4 |
380 |
|
T6 |
2 |
|
T10 |
2282 |
zero_val |
158300 |
1 |
|
|
T19 |
178 |
|
T20 |
182 |
|
T24 |
158 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
46783 |
1 |
|
|
T4 |
94 |
|
T10 |
508 |
|
T18 |
27 |
higher_val |
higher_val |
auto[1] |
19871 |
1 |
|
|
T19 |
18 |
|
T20 |
31 |
|
T24 |
22 |
higher_val |
lower_val |
auto[0] |
46744 |
1 |
|
|
T4 |
95 |
|
T6 |
1 |
|
T10 |
542 |
higher_val |
lower_val |
auto[1] |
19899 |
1 |
|
|
T19 |
17 |
|
T20 |
17 |
|
T24 |
12 |
higher_val |
zero_val |
auto[0] |
79 |
1 |
|
|
T20 |
1 |
|
T12 |
1 |
|
T34 |
3 |
higher_val |
zero_val |
auto[1] |
39477 |
1 |
|
|
T19 |
47 |
|
T20 |
45 |
|
T24 |
42 |
lower_val |
higher_val |
auto[0] |
46418 |
1 |
|
|
T4 |
96 |
|
T10 |
528 |
|
T18 |
22 |
lower_val |
higher_val |
auto[1] |
19805 |
1 |
|
|
T19 |
16 |
|
T20 |
27 |
|
T24 |
22 |
lower_val |
lower_val |
auto[0] |
46123 |
1 |
|
|
T4 |
96 |
|
T10 |
528 |
|
T11 |
2 |
lower_val |
lower_val |
auto[1] |
19983 |
1 |
|
|
T19 |
19 |
|
T20 |
16 |
|
T24 |
14 |
lower_val |
zero_val |
auto[0] |
92 |
1 |
|
|
T19 |
1 |
|
T52 |
1 |
|
T110 |
1 |
lower_val |
zero_val |
auto[1] |
39367 |
1 |
|
|
T19 |
48 |
|
T20 |
39 |
|
T24 |
40 |
zero_val |
higher_val |
auto[0] |
585 |
1 |
|
|
T10 |
1 |
|
T19 |
4 |
|
T22 |
2 |
zero_val |
higher_val |
auto[1] |
129 |
1 |
|
|
T20 |
1 |
|
T34 |
2 |
|
T14 |
1 |
zero_val |
lower_val |
auto[0] |
627 |
1 |
|
|
T4 |
1 |
|
T6 |
1 |
|
T11 |
1 |
zero_val |
lower_val |
auto[1] |
139 |
1 |
|
|
T19 |
2 |
|
T20 |
1 |
|
T34 |
1 |
zero_val |
zero_val |
auto[0] |
255 |
1 |
|
|
T19 |
1 |
|
T20 |
1 |
|
T72 |
1 |
zero_val |
zero_val |
auto[1] |
189 |
1 |
|
|
T19 |
2 |
|
T34 |
1 |
|
T14 |
1 |