Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	721	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5832	1			T19	43		T20	23		T24	20
len_601_800	13058	1			T19	96		T20	61		T24	40
len_401_600	8775	1			T19	52		T20	57		T24	23
len_201_400	16706	1			T10	251		T19	27		T20	14
len_65_200	73389	1			T10	680		T18	50		T19	53
len_min_for_xof_require_squeeze	977	1			T10	10		T19	1		T53	10
len_keccak_block_sizes[72]	743	1			T10	5		T18	1		T19	1
len_keccak_block_sizes[104]	739	1			T10	5		T18	1		T73	1
len_keccak_block_sizes[136]	751	1			T10	5		T19	1		T20	1
len_keccak_block_sizes[144]	290	1			T10	5		T18	1		T73	2
len_keccak_block_sizes[168]	283	1			T10	5		T20	1		T53	5
len_datapath_width	14315	1			T10	5		T11	3		T18	4
len_2_63	211636	1			T4	390		T10	1329		T11	6
len_1	62	1			T18	2		T73	2		T36	1