Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
323806 |
1 |
|
|
T1 |
4530 |
|
T2 |
2 |
|
T3 |
2 |
auto[1] |
374712 |
1 |
|
|
T2 |
78 |
|
T3 |
44 |
|
T34 |
14 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
174509 |
1 |
|
|
T1 |
1038 |
|
T2 |
19 |
|
T3 |
12 |
lower_val |
172946 |
1 |
|
|
T1 |
1100 |
|
T2 |
18 |
|
T3 |
13 |
zero_val |
1877 |
1 |
|
|
T1 |
7 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
254762 |
1 |
|
|
T1 |
2314 |
|
T2 |
16 |
|
T3 |
8 |
lower_val |
254948 |
1 |
|
|
T1 |
2216 |
|
T2 |
24 |
|
T3 |
14 |
zero_val |
188808 |
1 |
|
|
T2 |
40 |
|
T3 |
24 |
|
T34 |
6 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
40410 |
1 |
|
|
T1 |
525 |
|
T2 |
1 |
|
T35 |
543 |
higher_val |
higher_val |
auto[1] |
23193 |
1 |
|
|
T2 |
4 |
|
T3 |
3 |
|
T37 |
9 |
higher_val |
lower_val |
auto[0] |
40453 |
1 |
|
|
T1 |
513 |
|
T34 |
1 |
|
T35 |
589 |
higher_val |
lower_val |
auto[1] |
23223 |
1 |
|
|
T2 |
5 |
|
T3 |
2 |
|
T37 |
5 |
higher_val |
zero_val |
auto[0] |
99 |
1 |
|
|
T37 |
1 |
|
T39 |
1 |
|
T42 |
1 |
higher_val |
zero_val |
auto[1] |
47131 |
1 |
|
|
T2 |
9 |
|
T3 |
7 |
|
T34 |
1 |
lower_val |
higher_val |
auto[0] |
40023 |
1 |
|
|
T1 |
569 |
|
T35 |
573 |
|
T36 |
44 |
lower_val |
higher_val |
auto[1] |
23294 |
1 |
|
|
T2 |
1 |
|
T3 |
4 |
|
T37 |
10 |
lower_val |
lower_val |
auto[0] |
39836 |
1 |
|
|
T1 |
531 |
|
T35 |
571 |
|
T36 |
54 |
lower_val |
lower_val |
auto[1] |
23203 |
1 |
|
|
T2 |
5 |
|
T3 |
5 |
|
T37 |
15 |
lower_val |
zero_val |
auto[0] |
94 |
1 |
|
|
T40 |
1 |
|
T195 |
1 |
|
T196 |
1 |
lower_val |
zero_val |
auto[1] |
46496 |
1 |
|
|
T2 |
12 |
|
T3 |
4 |
|
T34 |
3 |
zero_val |
higher_val |
auto[0] |
568 |
1 |
|
|
T1 |
4 |
|
T2 |
1 |
|
T35 |
5 |
zero_val |
higher_val |
auto[1] |
158 |
1 |
|
|
T38 |
2 |
|
T42 |
1 |
|
T99 |
1 |
zero_val |
lower_val |
auto[0] |
517 |
1 |
|
|
T1 |
3 |
|
T34 |
1 |
|
T35 |
2 |
zero_val |
lower_val |
auto[1] |
138 |
1 |
|
|
T197 |
2 |
|
T198 |
2 |
|
T117 |
2 |
zero_val |
zero_val |
auto[0] |
263 |
1 |
|
|
T3 |
1 |
|
T37 |
1 |
|
T39 |
1 |
zero_val |
zero_val |
auto[1] |
233 |
1 |
|
|
T37 |
2 |
|
T42 |
1 |
|
T72 |
5 |