Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	687	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5814	1			T2	4		T3	2		T34	4
len_601_800	12863	1			T2	9		T3	8		T34	1
len_401_600	8788	1			T2	8		T3	6		T34	1
len_201_400	16640	1			T1	251		T2	3		T3	2
len_65_200	73975	1			T1	680		T2	1		T3	1
len_min_for_xof_require_squeeze	1010	1			T1	10		T2	1		T35	9
len_keccak_block_sizes[72]	745	1			T1	5		T35	9		T57	1
len_keccak_block_sizes[104]	760	1			T1	5		T35	9		T57	3
len_keccak_block_sizes[136]	754	1			T1	5		T35	9		T57	1
len_keccak_block_sizes[144]	290	1			T1	5		T57	1		T104	5
len_keccak_block_sizes[168]	282	1			T1	5		T104	5		T200	5
len_datapath_width	14182	1			T1	5		T35	9		T57	7
len_2_63	214566	1			T1	1329		T2	14		T3	1
len_1	56	1			T57	2		T115	1		T201	1