Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10317	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9031	1			T3	38		T7	38		T30	17
len_5001_7500	14379	1			T3	36		T7	36		T30	55
len_2501_5000	9275	1			T3	36		T7	36		T30	16
len_1025_2500	5387	1			T3	22		T7	22		T30	3
len_769_1024	6193	1			T3	4		T7	4		T30	28
len_513_768	6679	1			T3	4		T7	4		T30	26
len_257_512	21179	1			T3	52		T7	52		T30	38
len_0_256	258746	1			T3	2017		T7	2017		T8	9
len_keccak_block_sizes[72]	715	1			T3	3		T7	3		T31	3
len_keccak_block_sizes[104]	619	1			T3	3		T7	3		T31	3
len_keccak_block_sizes[136]	527	1			T3	3		T7	3		T31	3
len_keccak_block_sizes[144]	425	1			T3	3		T7	3		T31	3
len_keccak_block_sizes[168]	321	1			T3	3		T7	3		T31	3
len_1	766	1			T3	3		T7	3		T31	3
len_0	1223	1			T3	3		T7	3		T30	8