Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8891	1			T1	52		T3	24		T30	30
len_5001_7500	14254	1			T1	100		T3	24		T30	30
len_2501_5000	9234	1			T1	26		T3	24		T30	30
len_1025_2500	5420	1			T1	13		T3	14		T30	16
len_769_1024	6434	1			T1	37		T3	2		T4	10
len_513_768	6879	1			T1	33		T3	3		T4	13
len_257_512	21422	1			T1	35		T3	2		T4	9
len_0_256	259273	1			T1	150		T3	211		T4	112
len_keccak_block_sizes[72]	717	1			T3	2		T30	3		T31	3
len_keccak_block_sizes[104]	632	1			T3	2		T30	3		T31	3
len_keccak_block_sizes[136]	520	1			T1	1		T30	3		T31	3
len_keccak_block_sizes[144]	421	1			T30	3		T31	3		T32	3
len_keccak_block_sizes[168]	327	1			T30	3		T31	3		T32	3
len_1	749	1			T1	1		T3	2		T30	3
len_0	1218	1			T1	12		T3	2		T30	3