Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	709	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5566	1			T1	44		T4	14		T10	4
len_601_800	12652	1			T1	130		T4	13		T10	12
len_401_600	8452	1			T1	84		T4	12		T10	8
len_201_400	16495	1			T1	37		T4	7		T31	251
len_65_200	74434	1			T1	67		T4	36		T30	685
len_min_for_xof_require_squeeze	1014	1			T1	2		T30	9		T31	10
len_keccak_block_sizes[72]	759	1			T30	9		T31	5		T32	5
len_keccak_block_sizes[104]	766	1			T4	1		T30	9		T31	5
len_keccak_block_sizes[136]	749	1			T1	1		T30	9		T31	5
len_keccak_block_sizes[144]	279	1			T4	1		T31	5		T32	5
len_keccak_block_sizes[168]	297	1			T1	1		T31	5		T10	1
len_datapath_width	14180	1			T1	15		T4	11		T30	9
len_2_63	215005	1			T1	107		T3	310		T4	68
len_1	70	1			T1	1		T4	1		T69	1