Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10267	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9281	1			T1	24		T3	30		T28	29
len_5001_7500	14902	1			T1	62		T3	72		T28	82
len_2501_5000	9340	1			T1	15		T3	9		T28	17
len_1025_2500	5531	1			T1	4		T3	6		T28	9
len_769_1024	6280	1			T1	38		T3	2		T28	1
len_513_768	6724	1			T1	39		T28	3		T29	41
len_257_512	20842	1			T1	38		T29	34		T32	13
len_0_256	256427	1			T1	129		T3	21		T7	9
len_keccak_block_sizes[72]	714	1			T33	2		T8	2		T87	3
len_keccak_block_sizes[104]	616	1			T33	2		T8	2		T87	3
len_keccak_block_sizes[136]	516	1			T87	3		T71	2		T193	3
len_keccak_block_sizes[144]	418	1			T87	3		T193	3		T194	2
len_keccak_block_sizes[168]	323	1			T87	3		T193	3		T191	3
len_1	757	1			T1	1		T33	2		T8	2
len_0	1239	1			T1	6		T3	5		T28	7