Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	691	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5838	1			T1	39		T3	26		T28	25
len_601_800	12786	1			T1	101		T3	43		T28	47
len_401_600	8543	1			T1	58		T3	38		T28	38
len_201_400	16633	1			T1	32		T3	18		T28	35
len_65_200	73387	1			T1	50		T3	9		T28	8
len_min_for_xof_require_squeeze	1010	1			T28	2		T87	9		T193	9
len_keccak_block_sizes[72]	752	1			T1	1		T87	9		T193	9
len_keccak_block_sizes[104]	743	1			T46	1		T87	9		T193	9
len_keccak_block_sizes[136]	747	1			T3	1		T29	1		T87	9
len_keccak_block_sizes[144]	290	1			T28	1		T191	5		T195	1
len_keccak_block_sizes[168]	275	1			T191	5		T74	1		T196	5
len_datapath_width	14210	1			T1	12		T3	1		T7	3
len_2_63	212913	1			T1	96		T3	3		T7	6
len_1	65	1			T28	1		T29	1		T197	2