Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10080	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8799	1			T3	31		T23	19		T27	11
len_5001_7500	14129	1			T3	51		T23	18		T24	33
len_2501_5000	8956	1			T3	17		T23	18		T24	34
len_1025_2500	5253	1			T3	9		T23	11		T24	20
len_769_1024	6268	1			T3	45		T8	7		T23	2
len_513_768	6672	1			T3	44		T8	7		T23	2
len_257_512	20824	1			T3	42		T8	11		T9	2
len_0_256	248580	1			T1	9		T3	122		T7	9
len_keccak_block_sizes[72]	701	1			T23	2		T24	2		T193	2
len_keccak_block_sizes[104]	601	1			T23	2		T108	2		T82	2
len_keccak_block_sizes[136]	508	1			T3	1		T23	2		T108	2
len_keccak_block_sizes[144]	425	1			T108	2		T82	2		T192	3
len_keccak_block_sizes[168]	303	1			T192	3		T139	3		T143	3
len_1	729	1			T22	1		T23	2		T24	2
len_0	1132	1			T3	6		T22	6		T23	2