Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	9967	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8586	1			T2	17		T8	38		T14	38
len_5001_7500	13498	1			T2	17		T8	36		T14	36
len_2501_5000	8935	1			T2	17		T8	36		T14	36
len_1025_2500	5228	1			T2	10		T8	22		T14	22
len_769_1024	5971	1			T2	2		T7	10		T8	4
len_513_768	6424	1			T2	2		T7	7		T8	4
len_257_512	20358	1			T2	2		T7	11		T8	52
len_0_256	247979	1			T2	290		T7	4		T8	2017
len_keccak_block_sizes[72]	705	1			T2	2		T8	3		T14	3
len_keccak_block_sizes[104]	610	1			T2	2		T8	3		T14	3
len_keccak_block_sizes[136]	508	1			T2	2		T7	1		T8	3
len_keccak_block_sizes[144]	400	1			T2	2		T8	3		T14	3
len_keccak_block_sizes[168]	302	1			T8	3		T14	3		T42	3
len_1	738	1			T2	2		T8	3		T14	3
len_0	1143	1			T2	2		T8	3		T14	3